FDC37M81x SMSC Corporation, FDC37M81x Datasheet - Page 144

• Manufacturer Part Number: FDC37M81x
• Description: PC98/99 Compliant Enhanced Super I/O Controller
• Manufacturer: SMSC Corporation

Note 1: A logical device will be active and powered up according to the following equation:
Interrupt Select
Defaults :
0x70 = 0x00 or 0X06
(Note 3)
on VCC POR, VTR POR,
SOFT RESET and HARD
RESET
0x72 = 0x00,
on VCC POR, VTR POR,
SOFT RESET and HARD
RESET
DMA Channel Select
Default = 0x04 or 0X02
(Note 4)
on VCC POR, VTR POR,
SOFT RESET and HARD
RESET
32-Bit Memory Space
Configuration
Logical Device
Logical Device
Configuration
Reserved
LOGICAL DEVICE
REGISTER
DEVICE ON (ACTIVE) = (Activate Bit SET or Pwr/Control Bit SET).
The Logical device's Activate Bit and its Pwr/Control Bit are linked such that setting or
clearing one sets or clears the other. If the I/O Base Addr of the logical device is not
within the Base I/O range as shown in the Logical Device I/O map, then read or write is
not valid and is ignored.
(0xA9-0xDF)
(0xE0-0xFE)
(0x76-0xA8)
(0x70,0x72)
(0x71,0x73)
(0x74,0x75)
ADDRESS
0xFF
Table 54 - Logical Device Registers
0x70 is implemented for each logical device.
Refer
description. Only the keyboard controller uses
Interrupt Select register 0x72. Unused register
(0x72) will ignore writes and return zero when
read.
compatible).
Reserved - not implemented. These register
locations ignore writes and return zero when
read.
Only 0x74 is implemented for FDC and Parallel
port.
writes and returns zero when read. Refer to
DMA Channel Configuration.
Reserved - not implemented. These register
locations ignore writes and return zero when
read.
Reserved - not implemented. These register
locations ignore writes and return zero when
read.
Reserved - Vendor Defined (see SMSC
defined
Registers).
Reserved
144
0x75 is not implemented and ignores
to
Interrupts default to edge high (ISA
Logical
Interrupt
DESCRIPTION
Device
Configuration Register
Configuration
STATE
C
C
C
C
C