EM638165 Etron Technology Inc., EM638165 Datasheet - Page 12

• Manufacturer Part Number: EM638165
• Description: 4Mega x 16 Synchronous DRAM (SDRAM)
• Manufacturer: Etron Technology Inc.

Preliminary
The Burst Type can be one of two modes, Interleave Mode or Sequential Mode.
--- Addressing Sequence of Sequential Mode
An internal column address is performed by increasing the address from the column address which
is input to the device. The internal column address is varied by the Burst Length as shown in the
following table. When the value of column address, (n + m), in the table is larger than 255, only the
least significant 8 bits are effective.
--- Addressing Sequence of Interleave Mode
A column access is started in the input column address and is performed by inverting the address
bits in the sequence shown in the following table.
This field specifies the number of clock cycles from the assertion of the Read command to the first
read data. The minimum whole value of CAS# Latency depends on the frequency of CLK. The
minimum whole value satisfying the following formula must be programmed into this field.
t
Column Address
CAC
Data n
Data 0
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Burst Length
(min)
Burst Type Field (A3)
CAS# Latency Field (A6~A4)
A3
Data n
0
1
A6
0
0
0
0
1
CAS# Latency X t
A7
A7
A7
A7
A7
A7
A7
A7
A6
A6
A6
A6
A6
A6
A6
A6
Full Page: Column address is repeated until terminated.
0
n
2 words:
4 words:
8 words:
A5
Burst Type
Sequential
Interleave
X
0
0
1
1
A5
A5
A5
A5
A5
A5
A5
A5
n+1
1
CK
A4
A4
A4
A4
A4
A4
A4
A4
n+2
2
Column Address
A3
A3
A3
A3
A3
A3
A3
A3
n+3
A4
X
0
1
0
1
3
A2
A2
A2
A2
A2#
A2#
A2#
A2#
12
n+4
4
A1
A1
A1#
A1#
A1
A1
A1#
A1#
CAS# Latency
n+5
5
Reserved
Reserved
Reserved
A0
A0#
2 clocks
3 clocks
A0
A0#
A0
A0#
A0
A0#
n+6
6
n+7
7
-
-
n+255
255
Rev 0.6
4 words
EM638165
256
n
Burst Length
257
Feb. 2001
n+1
8 words
-
-