XC2S50 Xilinx, Inc., XC2S50 Datasheet - Page 63

• Manufacturer Part Number: XC2S50
• Description: Spartan-II 2.5V FPGA Family
• Manufacturer: Xilinx, Inc.

Spartan-II 2.5V FPGA Family: DC and Switching Characteristics
Calculation of T
Capacitance
T
to the pad. The values for T
capacitive load (C
table
For other capacitive loads, use the formulas below to calcu-
late an adjusted propagation delay, T
Where:
Delay Measurement Methodology
Notes:
1.
2.
3.
4.
Module 3 of 4
10
LVTTL
LVCMOS2
PCI33_5
PCI33_3
PCI66_3
GTL
GTL+
HSTL Class I
HSTL Class III V
HSTL Class IV V
SSTL3 I and II V
SSTL2 I and II V
CTT
AGP
IOOP
Standard
Adj
C
F
Input waveform switches between V
Measurements are made at V
Minimum. Worst-case values are reported.
I/O parameter measurements are made with the capacitance
values shown in the table,
See Xilinx application note
terminations.
I/O standard measurements are reflected in the IBIS model
information except where the IBIS format precludes it.
Constants for Calculating T
L
LOAD
is the propagation delay from the O Input of the IOB
T
IOOP1
is selected from
Adjustments for Different
page
is the capacitive load for the design
is the capacitance scaling factor
= T
(0.2xV
V
V
V
V
9, according to the I/O standard used
REF
SL
REF
REF
REF
REF
REF
REF
REF
IOOP
V
V
IOOP
) for each I/O standard as listed in the
REF
L
0
0
– 0.75 V
(1)
– 0.2
– 0.2
– 0.5
– 0.5
– 0.5
– 1.0
– 0.2
CCO
+ Adj + (C
–
Per PCI Spec
Per PCI Spec
Per PCI Spec
as a Function of
)
IOOP
Constants for Calculating T
XAPP179
IOB Output Delay
(0.2xV
V
V
V
V
V
V
V
REF
REF
REF
REF
REF
REF
REF
REF
REF
V
are based on the standard
V
REF
2.5
LOAD
H
Typ, Maximum, and
IOOP
3
+ 0.75 V
+ 0.2
+ 0.2
+ 0.5
+ 0.5
+ 0.5
+ 1.0
+ 0.2
(1)
L
CCO
IOOP1
and V
+
for the appropriate
, below.
– C
Standards,
)
.
Meas.
H
1.125
SL
Point
V
V
V
V
V
V
V
V
.
1.4
REF
REF
REF
REF
REF
REF
REF
REF
REF
) * F
L
Per AGP
Typ
V
0.80
0.75
0.90
0.90
1.25
Spec
1.0
1.5
1.5
REF
www.xilinx.com
1-800-255-7778
IOOP
-
-
-
-
-
(2)
.
Constants for Calculating T
Notes:
1.
2.
LVTTL Fast Slew Rate, 2 mA drive
LVTTL Fast Slew Rate, 4 mA drive
LVTTL Fast Slew Rate, 6 mA drive
LVTTL Fast Slew Rate, 8 mA drive
LVTTL Fast Slew Rate, 12 mA drive
LVTTL Fast Slew Rate, 16 mA drive
LVTTL Fast Slew Rate, 24 mA drive
LVTTL Slow Slew Rate, 2 mA drive
LVTTL Slow Slew Rate, 4 mA drive
LVTTL Slow Slew Rate, 6 mA drive
LVTTL Slow Slew Rate, 8 mA drive
LVTTL Slow Slew Rate, 12 mA drive
LVTTL Slow Slew Rate, 16 mA drive
LVTTL Slow Slew Rate, 24 mA drive
LVCMOS2
PCI 33 MHz 5V
PCI 33 MHZ 3.3V
PCI 66 MHz 3.3V
GTL
GTL+
HSTL Class I
HSTL Class III
HSTL Class IV
SSTL2 Class I
SSTL2 Class II
SSTL3 Class I
SSTL3 Class II
CTT
AGP
I/O parameter measurements are made with the capacitance
values shown above. See Xilinx application note
for the appropriate terminations.
I/O standard measurements are reflected in the IBIS model
information except where the IBIS format precludes it.
Standard
DS001-3 (v2.7) September 3, 2003
IOOP
Product Specification
C
(pF)
SL
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
50
10
10
20
20
20
30
30
30
30
20
10
0
0
(1)
XAPP179
0.41
0.20
0.13
0.079
0.044
0.043
0.033
0.41
0.20
0.100
0.086
0.058
0.050
0.048
0.041
0.050
0.050
0.033
0.014
0.017
0.022
0.016
0.014
0.028
0.016
0.029
0.016
0.035
0.037
(ns/pF)
F
L
R