XC2S50 Xilinx, Inc., XC2S50 Datasheet - Page 81

• Manufacturer Part Number: XC2S50
• Description: Spartan-II 2.5V FPGA Family
• Manufacturer: Xilinx, Inc.

Spartan-II 2.5V FPGA Family: Pinout Tables
XC2S50 Device Pinouts (Continued)
Module 4 of 4
10
Notes:
1.
2.
I/O
I/O
I/O
V
V
GND
I/O
I/O
I/O
I/O
I/O
I/O, V
GND
I/O
I/O
I/O
I/O
I/O
TCK
V
V
04/18/01
XC2S50 Pad Name
CCINT
CCO
CCO
CCO
Function
IRDY and TRDY can only be accessed when using Xilinx PCI
cores.
Pads labelled GND*, V
V
V
independent ground or power planes within the package.
REF
CCO
CCO
Bank 2*, V
Bank 6*, V
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
-
-
-
-
CCO
CCO
Bank 3*, V
TQ144
Bank 7* are internally bonded to
P144
CCINT
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
-
-
-
-
-
-
-
-
-
*, V
CCO
CCO
PQ208
P193
P194
P195
P196
P197
P198
P199
P200
P201
P202
P203
P204
P205
P206
P207
P208
P208
-
-
-
-
Bank 0*, V
Bank 4*, V
V
Bank 0*
Bank 0*
Bank 7*
FG256
GND*
GND*
V
V
V
CCINT
E7
C7
B6
A5
C6
B5
D6
A4
B4
E6
D5
A3
C5
B3
C4
CCO
CCO
CCO
CCO
CCO
*
Bank 1*,
Bank 5*,
Bndry
Scan
104
107
110
113
116
119
122
125
128
131
134
137
140
www.xilinx.com
98
1-800-255-7778
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Additional XC2S50 Package Pins
TQ144
11/02/00
PQ208
11/02/00
FG256
11/02/00
P104
G10
P55
H11
F10
J11
L10
M5
C3
E8
E9
H5
A1
K8
P4
L9
L8
J5
J7
P105
M12
P56
C14
H12
A16
G11
F11
L11
J12
M9
M8
H6
R4
F8
F9
K9
J6
J8
Not Connected Pins
Not Connected Pins
Not Connected Pins
V
V
V
V
V
V
V
V
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
K10
D4
N4
G6
H7
R2
B2
J9
V
-
-
-
-
-
-
-
-
-
-
-
GND Pins
CCINT
Bank 0 Pins
Bank 1 Pins
Bank 2 Pins
Bank 3 Pins
Bank 4 Pins
Bank 5 Pins
Bank 6 Pins
Bank 7 Pins
DS001-4 (v2.5) September 3, 2003
Pins
D13
N13
B15
K11
R15
J10
G7
H8
-
-
-
-
-
-
-
-
-
-
-
Product Specification
G8
H9
E5
P3
F6
K6
T1
L6
-
-
-
-
-
-
-
-
-
-
-
E12
P14
H10
T16
G9
K7
F7
L7
-
-
-
-
-
-
-
-
-
-
-
R