LM3S1133 Luminary Micro, Inc, LM3S1133 Datasheet - Page 130
LM3S1133
Manufacturer Part Number
LM3S1133
Description
Lm3s1133 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1133.pdf
(527 pages)
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Reset
Reset
Type
Type
Hibernation Module
Hibernation RTC Counter (HIBRTCC)
Base 0x400F.C000
Offset 0x000
Type RO, reset 0x0000.0000
130
Bit/Field
31:0
RO
RO
31
15
0
0
Register 1: Hibernation RTC Counter (HIBRTCC), offset 0x000
This register is the current 32-bit value of the RTC counter.
Note:
RO
RO
30
14
0
0
RO
RO
29
13
0
0
Name
RTCC
HIBRTCC, HIBRTCM0, HIBRTCM1, HIBRTCLD, HIBRTCT, and HIBDATA are on the
Hibernation module clock domain and require a delay of t
accesses. See “Register Access Timing” on page 123.
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
RO
RO
RO
26
10
0
0
0x0000.0000
Reset
RO
RO
25
0
9
0
Preliminary
RO
RO
24
0
8
0
Description
RTC Counter
A read returns the 32-bit counter value. This register is read-only. To
change the value, use the HIBRTCLD register.
RTCC
RTCC
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
HIB_REG_WRITE
RO
RO
20
0
4
0
RO
RO
19
0
3
0
between write
RO
RO
18
0
2
0
July 26, 2008
RO
RO
17
0
1
0
RO
RO
16
0
0
0
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