LM3S1133 Luminary Micro, Inc, LM3S1133 Datasheet - Page 397
LM3S1133
Manufacturer Part Number
LM3S1133
Description
Lm3s1133 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1133.pdf
(527 pages)
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Reset
Reset
Type
Type
I2C Master Data (I2CMDR)
I2C Master 0 base: 0x4002.0000
Offset 0x008
Type R/W, reset 0x0000.0000
July 26, 2008
Bit/Field
31:8
7:0
RO
RO
31
15
0
0
Register 3: I
This register contains the data to be transmitted when in the Master Transmit state, and the data
received when in the Master Receive state.
RO
RO
30
14
0
0
reserved
RO
RO
29
13
0
0
Name
DATA
RO
RO
28
12
0
0
reserved
2
C Master Data (I2CMDR), offset 0x008
RO
RO
27
11
0
0
Type
R/W
RO
RO
RO
26
10
0
0
Reset
0x00
0x00
RO
RO
25
0
9
0
Preliminary
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Data Transferred
Data transferred during transaction.
reserved
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
DATA
LM3S1133 Microcontroller
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
397
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