LM3S1133 Luminary Micro, Inc, LM3S1133 Datasheet - Page 438
LM3S1133
Manufacturer Part Number
LM3S1133
Description
Lm3s1133 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1133.pdf
(527 pages)
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Reset
Reset
Type
Type
Pulse Width Modulator (PWM)
PWM Interrupt Status and Clear (PWMISC)
Base 0x4002.8000
Offset 0x01C
Type R/W1C, reset 0x0000.0000
438
Bit/Field
31:17
15:1
16
0
RO
RO
31
15
0
0
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C
This register provides a summary of the interrupt status of the PWM generator block. A bit set to 1
indicates that the generator block is asserting an interrupt. The individual interrupt status registers
must be consulted to determine the reason for the interrupt, and used to clear the interrupt. For the
fault interrupt, a write of 1 to that bit position clears the latched interrupt status.
RO
RO
30
14
0
0
IntPWM0
reserved
reserved
RO
RO
29
13
IntFault
0
0
Name
RO
RO
28
12
0
0
RO
RO
27
11
0
0
R/W1C
Type
RO
RO
RO
RO
RO
26
10
0
0
Reset
0x00
0x00
RO
RO
25
0
9
0
0
0
Preliminary
reserved
reserved
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Fault Interrupt Asserted
Indicates that the fault input is asserting an interrupt.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PWM0 Interrupt Status
Indicates if the PWM generator 0 block is asserting an interrupt.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
July 26, 2008
RO
RO
17
0
1
0
IntPWM0
IntFault
R/W1C
RO
16
0
0
0
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