LM3S1133 Luminary Micro, Inc, LM3S1133 Datasheet - Page 15
LM3S1133
Manufacturer Part Number
LM3S1133
Description
Lm3s1133 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1133.pdf
(527 pages)
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Register 32:
General-Purpose Timers ............................................................................................................. 208
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Register 2:
Register 3:
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Register 5:
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Register 17:
Register 18:
Watchdog Timer ........................................................................................................................... 244
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Analog-to-Digital Converter (ADC) ............................................................................................. 267
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
July 26, 2008
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 207
GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 220
GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 221
GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 223
GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 225
GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 228
GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 230
GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 231
GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 232
GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 234
GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 235
GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ................................................... 236
GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 .................................................. 237
GPTM TimerA Prescale (GPTMTAPR), offset 0x038 ........................................................ 238
GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ....................................................... 239
GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 240
GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 241
GPTM TimerA (GPTMTAR), offset 0x048 ........................................................................ 242
GPTM TimerB (GPTMTBR), offset 0x04C ....................................................................... 243
Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 247
Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 248
Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 249
Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 250
Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 251
Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 252
Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 253
Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 254
Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 255
Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 256
Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 257
Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC ................................ 258
Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ................................. 259
Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ................................. 260
Watchdog Peripheral Identification 2 (WDTPeriphID2), offset 0xFE8 ................................. 261
Watchdog Peripheral Identification 3 (WDTPeriphID3), offset 0xFEC ................................. 262
Watchdog PrimeCell Identification 0 (WDTPCellID0), offset 0xFF0 .................................... 263
Watchdog PrimeCell Identification 1 (WDTPCellID1), offset 0xFF4 .................................... 264
Watchdog PrimeCell Identification 2 (WDTPCellID2), offset 0xFF8 .................................... 265
Watchdog PrimeCell Identification 3 (WDTPCellID3 ), offset 0xFFC .................................. 266
ADC Active Sample Sequencer (ADCACTSS), offset 0x000 ............................................. 275
ADC Raw Interrupt Status (ADCRIS), offset 0x004 ........................................................... 276
ADC Interrupt Mask (ADCIM), offset 0x008 ..................................................................... 277
ADC Interrupt Status and Clear (ADCISC), offset 0x00C .................................................. 278
ADC Overflow Status (ADCOSTAT), offset 0x010 ............................................................ 279
ADC Event Multiplexer Select (ADCEMUX), offset 0x014 ................................................. 280
Preliminary
LM3S1133 Microcontroller
15
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