CYNCP80192 Cypress Semiconductor, CYNCP80192 Datasheet - Page 19

• Manufacturer Part Number: CYNCP80192
• Description: Network Database Coprocessor
• Manufacturer: Cypress Semiconductor

Table 7-7. Move Command Parameters
For Move instruction, Data 0 is used to pass the source address pointer and SEID, destination address pointer and the SEID,
and the number of ×68 entries to be moved move/swap length.
The NDC implements the Move instruction as Burst Read and then a Burst Write into the NSEs.
Swap Command (05H). The Swap command’s structure is sw(addr1, addr2, len). The Swap command will use two 64-bit words
in the context descriptor: command word, and Data 0 word. Bits 15–0 of the Data 0 word will contain the first address; bits 23–19
will contain the first SEID; bits 39–24 will contain the second address, bits 47–43 will contain the second SEID; and bits 56–48
will contain the Swap block length (see Table 7-8). The maximum Swap block length is 128 words (of 68-bit each) in the NSE.
The minimum length for Swap is four locations.
Table 7-8. Swap Command Parameters
For Swap instruction, Data 0 is used to pass the first address pointer and SEID, the second address pointer and SEID, and the
number of ×68 entries to be swapped. The NDC implements the Swap instruction as two burst Reads and then two burst Writes
into the NSEs. Note. The Move and Swap commands will not work across the NSE boundaries if several NSEs are cascaded.
7.3.3
For SSRAM (connected to the NSE) Read or Write operations, Data 0 is used to pass the SSRAM address and SEID. Data 1 is
used for passing the data for a Write operation. Table 7-9 shows the format for Data 0 and Data 1 for accessing the SSRAM.
Table 7-9. SSRAM Data
For NSE Read and Write operations, the Data 0 is used to pass address and SEID. Data 1 is used for passing data for Write
operations. This 64-bit Data 1 field holds data[67:4] for the NSE, while data[3:0] is held in the layer attribute and valid bits field of
the command descriptor word. The NSE operation can be on the array, mask array, or the command registers. Table 7-10 shows
the format for Data 0 and Data 1 for accessing the NSE data, mask, and register locations.
Table 7-10. NSE Data, Mask, and Register Locations
7.3.4
These two registers return the result of the Read operation in two 64-bit words. Result Register 0 contains the four least significant
bits of data (layer attribute/valid bits) and the status of Read operation along with the processor and context ID. This is shown in
Table 7-11.
Table 7-11. Read Response at Result Register 0
Document #: 38-02043 Rev. *B
Data 0 Reserved Move Length Destination
ADR
Data 0
Bit Positions
ADR
63–56
55–48
47–40
39–32
31–24
SSRAM Read/Write
Data 0
Data 1
Result Register 0 and 1 for Read Operation
ADR
63–57
Data 0
Data 1
Reserved
ADR
63–7
Done
7
56–48
Swap Length
56–48
Reserved
6
47–43
SEID
Reserved
Reserved
Reserved
Second
47–43
63–24
SEID
63–24
Associative Data SSRAM Connected to Coprocessor Bus
Reserved
42–40
Reserved
5
42–40
Address Pointer
Destination
4
Second Address
23–19
39–24
SEID
Reserved
Reserved
Reserved
Pointer
39–24
Data[67:4]
23–19
SEID
Data[63:0]
3
Source SEID
Processor ID[4:0]
23–19
Context ID [4:0]
Reserved
First SEID
18–16
Reserved
23–19
18–16
2
Reserved
18–16
Reserved
18–16
CYNCP80192
1
Address[15:0]
Address[15:0]
Source Address
15–0
15–0
First Address
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Pointer
15–0
Pointer
15–0
0