ds26524 Maxim Integrated Products, Inc., ds26524 Datasheet - Page 188
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ds26524
Manufacturer Part Number
ds26524
Description
Ds26524 Quad T1/e1/j1 Transceiver
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS26524.pdf
(273 pages)
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: See E1TAF, E1TNAF, and
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: International Bit (Si).
Bit 6: Frame Alignment Signal Bit (0).
Bit 5: Frame Alignment Signal Bit (0).
Bit 4: Frame Alignment Signal Bit (1).
Bit 3: Frame Alignment Signal Bit (1).
Bit 2: Frame Alignment Signal Bit (0).
Bit 1: Frame Alignment Signal Bit (1).
Bit 0: Frame Alignment Signal Bit (1).
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: International Bit (Si).
Bit 6: Frame Non-Alignment Signal Bit (1).
Bit 5: Remote Alarm (Used to Transmit the Alarm) (A).
Bit 4: Additional Bit 4 (Sa4).
Bit 3: Additional Bit 5 (Sa5).
Bit 2: Additional Bit 6 (Sa6).
Bit 1: Additional Bit 7 (Sa7).
Bit 0: Additional Bit 8 (Sa8).
(MSB) 7
S=1
M2
C8
Si
Si
0
7
0
7
0
T1TSLC1, T1TSLC2, T1TSLC3 (T1 Mode)
Transmit SLC-96 Data Link Registers 1 to 3
164h, 165h, 166h + (200h x n): where n = 0 to 3, for Ports 1 to 4
E1TAF (E1 Mode)
Transmit Align Frame Register
164h + (200h x n): where n = 0 to 3, for Ports 1 to 4
E1TNAF (E1 Mode)
Transmit Non-Align Frame Register
165h + (200h x n): where n = 0 to 3, for Ports 1 to 4
M1
C7
S4
6
0
E1TSiAF
6
0
0
6
1
1
for E1 modes.
S=0
C6
S3
5
0
A
5
0
0
5
0
S=1
C5
S2
4
0
188 of 273
Sa4
1
1
0
4
4
S=0
C4
S1
3
0
Sa5
3
1
1
3
0
C11
C3
A2
2
0
Sa6
2
0
0
2
0
C10
C2
A1
1
0
0 (LSB)
Sa7
C1
C9
M3
1
1
1
1
0
0
T1TSLC1
T1TSLC2
T1TSLC3
Sa8
0
1
1
0
0
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