ds26524 Maxim Integrated Products, Inc., ds26524 Datasheet - Page 46

• Manufacturer Part Number: ds26524
• Description: Ds26524 Quad T1/e1/j1 Transceiver
• Manufacturer: Maxim Integrated Products, Inc.

Table 8-14
Table 8-14. Registers Related to Setting Up the Framer
Transmit Master Mode Register (TMMR)
Transmit Control Register 1 (TCR1)
Transmit Control Register 2 (TCR2)
Transmit Control Register 3 (TCR3)
Receive Master Mode Register (RMMR)
Receive Control Register 1 (RCR1)
Receive Control Register 2 (T1RCR2)
Receive Control Register 2 (E1RCR2)
Receive Latched Status Register 1 (RLS1)
Receive Interrupt Mask Register 1 (RIM1)
Receive Latched Status Register 2 (RLS2)
Receive Interrupt Mask Register 2 (RIM2)
Receive Latched Status Register 4 (RLS4)
Receive Interrupt Mask Register 4 (RIM4)
Frames Out of Sync Count Register 1
(FOSCR1)
Frames Out of Sync Count Register 2
(FOSCR2)
E1 Receive Align Frame Register (E1RAF)
E1 Receive Non-Align Frame Register
(E1RNAF)
Transmit SLC-96 Data Link Register 1
(T1TSLC1)
Transmit SLC-96 Data Link Register 2
(T1TSLC2)
Transmit SLC-96 Data Link Register 3
(T1TSLC3)
Receive SLC-96 Data Link Register 1
(T1RSLC1)
Receive SLC-96 Data Link Register 2
(T1RSLC2)
Receive SLC-96 Data Link Register 3
(T1RSLC3)
Note: The addresses shown are for Framer 1. Addresses for Framers 2 to 4 can be calculated using the following: Framer n = (Framer 1
address + (n - 1) x 200h); where n = 2 to 4 for Framers 2 to 4.
shows registers that are related to setting up the framing.
REGISTER
ADDRESSES
46 of 273
FRAMER
0A0h
0A1h
0A3h
180h
181h
182h
183h
080h
081h
014h
082h
090h
091h
093h
054h
055h
064h
065h
164h
165h
166h
064h
065h
066h
T1/E1 mode.
Source of the F-bit.
F-bit corruption, selection of SLC-96.
ESF or D4 mode selection.
T1/E1 selection for receiver.
Resynchronization criteria for the framer.
T1 remote alarm and OOF criteria.
E1 receive loss of signal criteria selection.
Receive latched status 1.
Receive interrupt mask 1.
Receive latched status 2.
Receive interrupt mask 2.
Receive latched status 4.
Receive interrupt mask 4.
Framer out of sync register 1.
Framer out of sync register 2.
RAF byte.
RNAF byte.
Transmit SLC-96 bits.
Transmit SLC-96 bits.
Transmit SLC-96 bits.
Receive SLC-96 bits.
Receive SLC-96 bits.
Receive SLC-96 bits.
FUNCTION