ds26524 Maxim Integrated Products, Inc., ds26524 Datasheet - Page 193

• Manufacturer Part Number: ds26524
• Description: Ds26524 Quad T1/e1/j1 Transceiver
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Framer Enable (FRM_EN). This bit must be set to the desired state before writing INIT_DONE.
Bit 6: Initialization Done (INIT_DONE). The user must set this bit once he has written the configuration registers.
The host is required to write or clear all device registers prior to setting this bit. Once INIT_DONE is set, the
DS26524 will check the FRM_EN bit and, if enabled will begin operation based on the initial configuration.
Bit 1: Soft Reset (SFTRST). Level sensitive-soft reset. Should be taken high then low to reset the transceiver.
Bit 0: Transmitter T1/E1 Mode Select (T1/E1). Sets operating mode for transmitter only! This bit must be written
with the desired value prior to setting INIT_DONE.
0 = Framer disabled—held in low-power state
1 = Framer enabled—all features active
0 = Normal operation
1 = Reset the transceiver
0 = T1 operation
1 = E1 operation
FRM_EN
7
0
INIT_DONE
TMMR
Transmit Master Mode Register
180h + (200h x n): where n = 0 to 3, for Ports 1 to 4
6
0
—
5
0
193 of 273
—
4
0
—
3
0
—
2
0
SFTRST
1
0
T1/E1
0
0