upd78f0124m6gba1-8et Renesas Electronics Corporation., upd78f0124m6gba1-8et Datasheet - Page 367

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upd78f0124m6gba1-8et

Manufacturer Part Number
upd78f0124m6gba1-8et
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
20.1 Functions of Clock Monitor
when the X1 input clock is stopped.
to 1. For details of RESF, refer to CHAPTER 19 RESET FUNCTION.
20.2 Configuration of Clock Monitor
Control register
The clock monitor samples the X1 input clock using the internal oscillator, and generates an internal reset signal
When a reset signal is generated by the clock monitor, bit 1 (CLMRF) of the reset control flag register (RESF) is set
The clock monitor automatically stops under the following conditions.
• Reset is released and during the oscillation stabilization time
• In STOP mode and during the oscillation stabilization time
• When the X1 input clock is stopped by software (MSTOP = 1 or MCC = 1) and during the oscillation stabilization
• When the internal oscillation clock is stopped
Remark MSTOP: Bit 7 of the main OSC control register (MOC)
The clock monitor includes the following hardware.
Remark MCC:
time
Item
X1 oscillation stabilization status
MCC:
MSTOP: Bit 7 of the main OSC control register (MOC)
OSTC:
X1 oscillation control signal
Clock monitor mode register (CLM)
Bit 7 of the processor clock control register (PCC)
Bit 7 of the processor clock control register (PCC)
Oscillation stabilization time counter status register (OSTC)
(OSTC overflow)
(MCC, MSTOP)
Figure 20-1. Block Diagram of Clock Monitor
Table 20-1. Configuration of Clock Monitor
CHAPTER 20 CLOCK MONITOR
Internal oscillation clock
User’s Manual U16315EJ3V1UD
Operation mode
Internal bus
X1 input clock
controller
CLME
Clock monitor
mode register (CLM)
Configuration
monitor circuit
X1 oscillation
Internal reset
signal
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