upd78f0134hgka1-9et-a Renesas Electronics Corporation., upd78f0134hgka1-9et-a Datasheet - Page 399

• Manufacturer Part Number: upd78f0134hgka1-9et-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

21.1 Functions of Clock Monitor
internal reset signal when the high-speed system clock is stopped.
to 1. For details of RESF, see CHAPTER 20 RESET FUNCTION.
21.2 Configuration of Clock Monitor
Control register
The clock monitor samples the high-speed system clock using the on-chip internal oscillator, and generates an
When a reset signal is generated by the clock monitor, bit 1 (CLMRF) of the reset control flag register (RESF) is set
The clock monitor automatically stops under the following conditions.
Remark MSTOP: Bit 7 of the main OSC control register (MOC)
The clock monitor includes the following hardware.
Remark MCC:
Reset is released and during the oscillation stabilization time
In STOP mode and during the oscillation stabilization time
When the high-speed system clock is stopped by software (MSTOP = 1 or MCC = 1) and during the oscillation
stabilization time
When the internal oscillation clock is stopped
Item
oscillation stabilization status
MCC:
MSTOP: Bit 7 of the main OSC control register (MOC)
OSTC:
High-speed system clock
High-speed system clock
oscillation control signal
Clock monitor mode register (CLM)
Bit 7 of the processor clock control register (PCC)
Bit 7 of the processor clock control register (PCC)
Oscillation stabilization time counter status register (OSTC)
(OSTC overflow)
(MCC, MSTOP)
Figure 21-1. Block Diagram of Clock Monitor
Table 21-1. Configuration of Clock Monitor
Internal oscillation clock
CHAPTER 21 CLOCK MONITOR
Operation mode
User’s Manual U16899EJ3V0UD
Internal bus
system clock
controller
CLME
High-speed
Clock monitor
mode register (CLM)
Configuration
High-speed system
clock oscillation
monitor circuit
Internal reset
signal
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