upd78f0134hgka1-9et-a Renesas Electronics Corporation., upd78f0134hgka1-9et-a Datasheet - Page 542

• Manufacturer Part Number: upd78f0134hgka1-9et-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

542
16-bit
timer/
event
counters
00, 01
(TM00,
TM01)
Function
CRC00:
Capture/
compare control
register 00
CRC01:
Capture/
compare control
register 01
TOC00: 16-bit
timer output
control register
00
TOC01: 16-bit
timer output
control register
01
PRM00:
Prescaler mode
register 00
Details of
Function
Timer operation must be stopped before setting CRC00.
When the mode in which clear & start occurs on a match between TM00 and
CR000 is selected with 16-bit timer mode control register 00 (TMC00), CR000
should not be specified as a capture register.
To ensure that the capture operation is performed properly, the capture trigger
requires a pulse longer than two cycles of the count clock selected by prescaler
mode register 00 (PRM00).
Timer operation must be stopped before setting CRC01.
When the mode in which clear & start occurs on a match between TM01 and
CR001 is selected with 16-bit timer mode control register 01 (TMC01), CR001
should not be specified as a capture register.
To ensure that the capture operation is performed properly, the capture trigger
requires a pulse longer than two cycles of the count clock selected by prescaler
mode register 01 (PRM01).
Timer operation must be stopped before setting other than TOC004.
If LVS00 and LVR00 are read, 0 is read.
OSPT00 is automatically cleared after data is set, so 0 is read.
Do not set OSPT00 to 1 other than in one-shot pulse output mode.
A write interval of two cycles or more of the count clock selected by prescaler
mode register 00 (PRM00) is required to write to OSPT00 successively.
Do not set LVS00 to 1 before TOE00, and do not set LVS00 and TOE00 to 1
simultaneously.
Perform <1> and <2> below in the following order, not at the same time.
<1> Set TOC001, TOC004, TOE00, OSPE00: Timer output operation setting
<2> Set LVS00, LVR00: Timer output F/F setting
Timer operation must be stopped before setting other than TOC014.
If LVS01 and LVR01 are read, 0 is read.
OSPT01 is automatically cleared after data is set, so 0 is read.
Do not set OSPT01 to 1 other than in one-shot pulse output mode.
A write interval of two cycles or more of the count clock selected by prescaler
mode register 01 (PRM01) is required to write to OSPT01 successively.
Do not set LVS01 to 1 before TOE01, and do not set LVS01 and TOE01 to 1
simultaneously.
Perform <1> and <2> below in the following order, not at the same time.
<1> Set TOC011, TOC014, TOE01, OSPE01: Timer output operation setting
<2> Set LVS01, LVR01: Timer output F/F setting
When the internal oscillation clock is selected as the clock to be supplied to the
CPU, the clock of the internal oscillator is divided and supplied as the count clock.
If the count clock is the internal oscillation clock, the operation of 16-bit
timer/event counter 00 is not guaranteed. When an external clock is used and
when the internal oscillation clock is selected and supplied to the CPU, the
operation of 16-bit timer/event counter 00 is not guaranteed, either, because the
internal oscillation clock is supplied as the sampling clock to eliminate noise.
Always set data to PRM00 after stopping the timer operation.
If the valid edge of the TI000 pin is to be set for the count clock, do not set the
clear & start mode using the valid edge of the TI000 pin and the capture trigger.
APPENDIX D LIST OF CAUTIONS
User’s Manual U16899EJ3V0UD
Cautions
p. 146
p. 146
p. 146
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p. 147
p. 147
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