upd78f0134hgka1-9et-a Renesas Electronics Corporation., upd78f0134hgka1-9et-a Datasheet - Page 544

• Manufacturer Part Number: upd78f0134hgka1-9et-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

544
16-bit
timer/
event
counters
00, 01
(TM00,
TM01)
Function
Pulse width
measurement
External event
counter
One-shot pulse
output:
Software trigger
One-shot pulse
output: External
trigger
Timer start
errors
16-bit timer
capture/compar
e register setting
Capture register
data retention
timing
Valid edge
setting
One-shot pulse
output: Software
trigger
One-shot pulse
output: External
trigger
One-shot pulse
output function
Details of
Function
To use two capture registers, set the TI00n and TI01n pins.
When reading the external event counter count value, TM0n should be read.
Do not set the OSPT0n bit to 1 while the one-shot pulse is being output. To
output the one-shot pulse again, wait until the current one-shot pulse output is
completed.
When using the one-shot pulse output of 16-bit timer/event counter 0n with a
software trigger, do not change the level of the TI00n pin or its alternate-function
port pin.
Because the external trigger is valid even in this case, the timer is cleared and
started even at the level of the TI00n pin or its alternate-function port pin, resulting
in the output of a pulse at an undesired timing.
Do not set the CR00n and CR01n registers to 0000H.
16-bit timer counter 0n starts operating as soon as a value other than 00
(operation stop mode) is set to the TMC0n3 and TMC0n2 bits.
Even if the external trigger is generated again while the one-shot pulse is output,
it is ignored.
Do not set the CR00n and CR01n registers to 0000H.
16-bit timer counter 0n starts operating as soon as a value other than 00
(operation stop mode) is set to the TMC0n3 and TMC0n2 bits.
An error of up to one clock may occur in the time required for a match signal to be
generated after timer start. This is because 16-bit timer counter 0n (TM0n) is
started asynchronously to the count clock.
In the mode in which clear & start occurs on a match between TM0n and CR00n,
set 16-bit timer capture/compare register 00n (CR00n) to other than 0000H. This
means a 1-pulse count operation cannot be performed when 16-bit timer/event
counter 0n is used as an external event counter.
The values of 16-bit timer capture/compare registers 00n and 01n (CR00n and
CR01n) are not guaranteed after 16-bit timer/event counter 0n has been stopped.
Set the valid edge of the TI00n pin after setting bits 2 and 3 (TMC0n2 and
TMC0n3) of 16-bit timer mode control register 0n (TMC0n) to 0, 0, respectively,
and then stopping timer operation. The valid edge is set using bits 4 and 5
(ES0n0 and ES0n1) of prescaler mode register 0n (PRM0n).
When a one-shot pulse is output, do not set the OSPT0n bit to 1. Do not output
the one-shot pulse again until INTTM00n, which occurs upon a match with the
CR00n register, or INTTM01n, which occurs upon a match with the CR01n
register, occurs.
If the external trigger occurs again while a one-shot pulse is output, it is ignored.
When using the one-shot pulse output of 16-bit timer/event counter 0n with a
software trigger, do not change the level of the TI00n pin or its alternate function
port pin.
Because the external trigger is valid even in this case, the timer is cleared and
started even at the level of the TI00n pin or its alternate function port pin, resulting
in the output of a pulse at an undesired timing.
APPENDIX D LIST OF CAUTIONS
User’s Manual U16899EJ3V0UD
Cautions
p. 160
p. 170
p. 173
p. 173
p. 174
p. 175
p. 175
p. 176
p. 177
p. 178
p. 178
p. 178
p. 178
p. 178
p. 178
p. 178
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