st20-gp6 STMicroelectronics, st20-gp6 Datasheet - Page 23

• Manufacturer Part Number: st20-gp6
• Description: Gps Processor
• Manufacturer: STMicroelectronics

4.4
Communication between processes takes place over channels, and is implemented in hardware.
Communication is point-to-point, synchronized and unbuffered. As a result, a channel needs no
process queue, no message queue and no message buffer.
A channel between two processes executing on the same CPU is implemented by a single word in
memory; a channel between processes executing on different processors is implemented by point-
to-point links. The processor provides a number of operations to support message passing, the
most important being in (input message) and out (output message).
The in and out instructions use the address of the channel to determine whether the channel is
internal or external. This means that the same instruction sequence can be used for both hard and
soft channels, allowing a process to be written and compiled without knowledge of where its chan-
nels are implemented.
Communication takes place when both the inputting and outputting processes are ready. Conse-
quently, the process which first becomes ready must wait until the second one is also ready. The
inputting and outputting processes only become active when the communication has completed.
A process performs an input or output by loading the evaluation stack with, a pointer to a message,
the address of a channel, and a count of the number of bytes to be transferred, and then executing
an in or out instruction.
4.5
There are two 32-bit hardware timer clocks which ‘tick’ periodically. These are independent of any
on-chip peripheral real time clock. The timers provide accurate process timing, allowing processes
to deschedule themselves until a specific time.
One timer is accessible only to high priority processes and is incremented approximately every
microsecond, cycling completely in approximately 4295 seconds. The other is accessible only to
low priority processes and is incremented approximately every 64 microseconds, giving 15625
ticks per second. It has a full period of approximately 76 hours. Timer frequencies are approximate.
The current value of the processor clock can be read by executing a ldtimer (load timer) instruction.
A process can arrange to perform a tin (timer input), in which case it will become ready to execute
after a specified time has been reached. The tin instruction requires a time to be specified. If this
time is in the ‘past’ then the instruction has no effect. If the time is in the ‘future’ then the process is
descheduled. When the specified time is reached the process becomes active. In addition, the
Process communications
Timers
ClockReg0
ClockReg1
TnextReg0
TnextReg1
TptrReg0
TptrReg1
Register
Current value of high priority (level 0) process clock.
Current value of low priority (level 1) process clock.
Indicates time of earliest event on high priority (level 0) timer queue.
Indicates time of earliest event on low priority (level 1) timer queue.
High priority timer queue.
Low priority timer queue.
Function
Table 4.2 Timer registers
ST20-GP6
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