st20-gp6 STMicroelectronics, st20-gp6 Datasheet - Page 41
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st20-gp6
Manufacturer Part Number
st20-gp6
Description
Gps Processor
Manufacturer
STMicroelectronics
Datasheet
1.ST20-GP6.pdf
(123 pages)
- Current page: 41 of 123
- Download datasheet (2Mb)
7.2
Table 7.3 gives the basic function code of each of the primary instructions. Where the operand is
less than 16, a single byte encodes the complete instruction. If the operand is greater than 15, one
prefix instruction ( pfix ) is required for each additional four bits of the operand. If the operand is neg-
ative the first prefix instruction will be nfix . Examples of pfix and nfix coding are given in Table 7.1.
Any instruction which is not in the instruction set tables is an invalid instruction and is flagged ille-
gal, returning an error code to the trap handler, if loaded and enabled.
The Notes column of the tables indicates the features of an instruction as described in Table 7.2
Instruction characteristics
is coded as
is coded as
is coded as
Ident
S
O
A
D
E
L
T
pfix
pfix
pfix
nfix
I
ldc
ldc
ldc
ldc
ldc
ldc
ldc
Mnemonic
Instruction can set an IntegerError trap
Instruction can cause a LoadTrap trap
Instruction can cause a StoreTrap trap
Instruction can cause an Overflow trap
Interruptible instruction
Instruction can be aborted and later restarted.
Instruction can deschedule
Instruction can timeslice
Feature
#3
#35
#3
#5
#987
#9
#8
#7
-31 ( ldc #FFFFFFE1)
#1
#1
Table 7.2 Instruction features
Table 7.1 Prefix coding
Function code
#4
#2
#4
#2
#2
#4
#6
#4
Memory code
#43
#23
#45
#29
#28
#47
#61
#41
ST20-GP6
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