st20-gp6 STMicroelectronics, st20-gp6 Datasheet - Page 24

• Manufacturer Part Number: st20-gp6
• Description: Gps Processor
• Manufacturer: STMicroelectronics

ST20-GP6
ldclock (load clock), stclock (store clock) instructions allow total control over the clock value and the
clockenb (clock enable), clockdis (clock disable) instructions allow each clock to be individually
stopped and re-started.
Figure 4.3 shows two processes waiting on the timer queue, one waiting for time 21, the other for
time 31.
4.6
A software error, such as arithmetic overflow or array bounds violation, can cause an error flag to
be set in the CPU. The flag is directly connected to the ErrorOut pin. Both the flag and the pin can
be ignored, or the CPU stopped. Stopping the CPU on an error means that the error cannot cause
further corruption. As well as containing the error in this way it is possible to determine the state of
the CPU and its memory at the time the error occurred. This is particularly useful for postmortem
debugging where the debugger can be used to examine the state and history of the processor
leading up to and causing the error condition.
In addition, if a trap handler process is installed, a variety of traps/exceptions can be trapped and
handled by software. A user supplied trap handler routine can be provided for each high/low pro-
cess priority level. The handler is started when a trap occurs and is given the reason for the trap.
The trap handler is not re-entrant and must not cause a trap itself within the same group. All traps
can be individually masked.
4.6.1
The trap mechanism is arranged on a per priority basis. For each priority there is a handler for each
group of traps, as shown in Figure 4.4.
24/123
ClockReg0
TptrReg0
TnextReg0
Traps and exceptions
Trap groups
Comparator
21
5
Figure 4.3 Timer registers
Alarm
Work spaces
Empty
31
21
Program