cs4228a Cirrus Logic, Inc., cs4228a Datasheet - Page 11

• Manufacturer Part Number: cs4228a
• Description: 24-bit, 96 Khz Surround Sound Codec
• Manufacturer: Cirrus Logic, Inc.

SWITCHING CHARACTERISTICS - CONTROL PORT
Notes: 20. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
I
SCL Clock Frequency
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup Time to SCL Rising
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
Rise Time of Both SDA and SCL Lines
2
C Mode (SDOUT < 47 kΩ to ground)
21. Pin 11 (SCL/CCLK) of the CS4228A does not have sufficient hysteresis to enable the use of standard
two-wire mode configurations with a resistor pull-up. This issue can be worked around by placing a
Schmitt Trigger buffer, for example a 74VHC14, on the SCL line just prior to the CS4228A. See Figure 5.
This will not affect the operation of the bus in either mode, as pin 6 is an input only.
S D A
S C L
Stop
Parameter
t buf
S C L
S ta rt
t hdst
t
lo w
Figure 5. I
V +
Figure 4. I
t
hdd
2
(Note 20)
(Note 21)
C Mode SCL Buffer Example
t high
2
C Control Port Timing
t sud
Symbol
t
t
t
t
t
t
t
t
susp
f
hdst
high
sust
hdd
sud
low
buf
scl
t
t
r
f
R epe a te d
t sust
S ta rt
(Inputs: Logic 0 = 0V, Logic 1 = VL)
t
hdst
P i n 1 1
Min
250
4.7
4.0
4.7
4.0
4.7
4.7
0
-
t r
t f
Max
100
300
30
CS4228A
Stop
t susp
Units
kHz
µs
µs
µs
µs
µs
µs
µs
ns
ns
ns
11