cs4228a Cirrus Logic, Inc., cs4228a Datasheet - Page 22

• Manufacturer Part Number: cs4228a
• Description: 24-bit, 96 Khz Surround Sound Codec
• Manufacturer: Cirrus Logic, Inc.

5. REGISTER DESCRIPTIONS
5.1
INCR
MAP4:0
5.2
HRM
CI1:0
5.3
DIGPDN
ADCPDN
22
INCR
HRM
DIGPDN
7
1
7
0
Memory Address Pointer (MAP)
CODEC Clock Mode
Chip Control
7
1
All registers are read/write except for Chip Status, which is read only. See the following bit definition tables
for bit assignment information. The default state of each bit after a power-up sequence or reset is listed
in the tables underneath each bit’s label. Default values are also marked in the text with an asterisk.
Not a register
Address 0x01
Address 0x02
trol port.
memory address pointer auto increment control
0 -
*1 -
Memory address pointer (MAP). Sets the register address that will be read or written by the con-
Sets the sample rate mode for the ADCs and DACs
*0 -
1 -
Specifies the ratio of MCLK to the sample rate of the ADCs and DACs (Fs)
Power down the digital portions of the CODEC
0 -
*1 -
Power down the analog section of the ADC
*0 -
1 -
6
0
6
0
RESERVED
CI1:0
6
0
*1
0
2
3
RESERVED
RESERVED
MAP is not incremented automatically.
internal MAP is automatically incremented after each read or write.
Base Rate Mode (BRM) supports sample rates up to 50 kHz
High Rate Mode (HRM) supports sample rates up to 100 kHz. Typically used for
96 kHz sample rate.
Digital power down.
Normal operation
Normal
ADC power down.
BRM (Fs)
5
0
5
0
128
256
384
512
5
0
MAP4
HRM (Fs)
ADCPDN
4
0
4
0
128
192
256
64
4
0
DACPDN56
MAP3
CI1
3
0
3
0
3
0
DACPDN34
MAP2
CI0
2
0
2
1
2
0
DACPDN12
MAP1
1
0
1
0
1
0
RESERVED
CS4228A
RESERVED
MAP0
0
1
0
0
0
0