cs4239 Cirrus Logic, Inc., cs4239 Datasheet - Page 59

• Manufacturer Part Number: cs4239
• Description: Crystalclear? Ortable Isa Audio System Logic
• Manufacturer: Cirrus Logic, Inc.

Block Power Down
CTRLbase+2, Default = 00000000
FM
PROC
DAC1
ADC1
MIX
VREF
SRC
PDWN
DS253PP2
PDWN
D7
SRC
D6
VREF
D5
Internal FM synthesizer powered
down when set.
Processor set to idle mode. When set,
places the internal processor in an
idle state. This effects the PnP inter-
face, MPU401, and SBPro devices.
Any command to any one of these
interfaces will cause the processor
to go active.
DAC1 power down. When set, powers
down DAC1. Playback is disabled.
ADC1 power down. When set, powers
down the ADC1. Capture is disabled.
Mixer power down. All analog input
and output channels are powered
down. All outputs are centered
around VREF if the VREF bit is set.
A reset is not required to maintain
the calibrated state if the mixer is
powered down but the VREF bit is
not set.
VREF power down. When set, powers
down the entire mixer. Since
powering down VREF, powers down
the entire analog section, some audi-
ble pops can occur.
Internal Sample-Rate Converters are
powered down. Only 44.1 kHz sam-
ple frequency is allowed when this
bit is set.
Global Power Down with data reten-
tion. When set, the entire chip is
powered down, except reads and
writes to this register. When this bit
is cleared, a full calibration is initi-
ated. All registers retain their values;
therefore, normal operation can re-
sume after calibration is completed.
MIX
D4
ADC1
D3
DAC1 PROC
D2
D1
D0
FM
NOTE: Software should mute the DACs and Mixers
and FM volume when asserting any power-down
modes to prevent clicks and pops.
Control Indirect Address Register
CTRLbase+3
CA3-CA0
Control Indirect Data Register
CTRLbase+4
CD7-CD0
Control/RAM Access
CTRLbase+5
CR7-CR0
Commands:
CD7
CR7
D7
D7
D7
res
CD6
CR6
D6
D6
D6
res
CrystalClear Portable ISA Audio System
CD5
CR5
D5
D5
D5
res
Address bits to access the Control
Indirect registers C0-C9 through
CTRLbase+4
register provides access to the indi-
rect registers C0-C9, where
CTRLbase+3 selects the actual reg-
ister. See the Control Indirect
Register section for more details.
This register controls the loading of
the part’s internal RAM. RAM sup-
port includes hardware configuration
and PnP default resource data, as
well as program memory. See the
Hostload Procedure section for more
information. Commands are followed
by address and data information.
0x56 - Disable Crystal Key
0x53 - Disable Crystal Key 2
0x5A - Update Hardware Configura-
tion Data.
0xAA - Download RAM. Address
followed by data. (Stopped by writ-
ing 0 to CTRLbase+6)
Control Indirect Data register. This
0x55 - Disable PnP Key
CD4
CR4
D4
D4
D4
TM
res
CA3
CD3
CR3
D3
D3
D3
CA2
CD2
CR2
D2
D2
D2
CD1
CR1
CA1
D1
D1
D1
CS4239
CA0
CD0
CR0
D0
D0
D0
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