cs4215 Cirrus Logic, Inc., cs4215 Datasheet - Page 19

• Manufacturer Part Number: cs4215
• Description: 16-bit Multimedia Audio Codec
• Manufacturer: Cirrus Logic, Inc.

Control Time Slot 3, Serial Port Control Register
Control Time Slot 4, Test Register
DS76F2
XEN
XCLK
BSEL1-0
MCK2-0
ITS
DAD
ENL
TEST
BIT
BIT
Transmitter Enable
Transmit Clock
Select Bit Rate
Clock Source Select
Immediate Three-
State
Loopback Mode
Enable Loopback
Testing
Test bits
Reset (R)
Reset (R)
Register
Register
NAME
NAME
ITS
D7
D7
0
0
MCK2 MCK1 MCK0 BSEL1 BSEL0 XCLK
D6
D6
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
0
0
0 0
0 1
1 0
1 1
0
1
0
1
0
1
0
1
0
1
VALUE
VALUE
D5
D5
0
0
TEST
0
1
2
3
0
1
2
3
4
R
R Receive SCLK and FSYNC from external source
R
R
R SCLK and FSYNC three-state up to 12 clocks
R Digital-Digital Loopback.
R Disable.
D4
D4
0
0
Enable the serial data output.
Disable (high-impedance state) serial data output.
Generate SCLK and FSYNC
64 bits per frame.
128 bits per frame.
256 bits per frame.
Reserved.
SCLK is master clock, 256 bits per frame.
XTAL1, 24.576 MHz, is clock source.
XTAL2, 16.9344 MHz, is clock source.
CLKIN is clock source, and must be 256xFs.
CLKIN is clock source, DFR2-0 select sample
SCLK and FSYNC three-state immediately
Digital-Analog-Digital Loopback.
Enable.
The TEST bits must be written as zero, otherwise
SLAVE Mode
MASTER Mode
BSEL must equal 2, and XCLK must equal 0.
frequency.
after D/C goes low.
after D/C goes low.
special factory test modes may be invoked.
D3
D3
1
0
D2
D2
0
0
ENL
FUNCTION
FUNCTION
D1
D1
0
0
XEN
DAD
D0
D0
1
0
CS4215
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