s908ey16g2vfar Freescale Semiconductor, Inc, s908ey16g2vfar Datasheet - Page 202
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s908ey16g2vfar
Manufacturer Part Number
s908ey16g2vfar
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.S908EY16G2VFAR.pdf
(292 pages)
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Timebase Module (TBM)
16.7 Timebase Control Register
The timebase has one register, the timebase control register (TBCR), which is used to enable the
timebase interrupts and set the rate.
TBIF — Timebase Interrupt Flag
TBR2–TBR0 — Timebase Divider Selection Bits
TACK— Timebase ACKnowledge Bit
TBIE — Timebase Interrupt Enabled Bit
TBON — Timebase Enabled Bit
202
This read-only flag bit is set when the timebase counter has rolled over.
These read/write bits select the tap in the counter to be used for timebase interrupts as shown in
Table
The TACK bit is a write-only bit and always reads as 0. Writing a 1 to this bit clears TBIF, the timebase
interrupt flag bit. Writing a 0 to this bit has no effect.
This read/write bit enables the timebase interrupt when the TBIF bit becomes set. Reset clears the
TBIE bit.
This read/write bit enables the timebase. Timebase may be turned off to reduce power consumption
when its function is not necessary. The counter can be initialized by clearing and then setting this bit.
Reset clears the TBON bit.
1 = Timebase interrupt pending
0 = Timebase interrupt not pending
1 = Clear timebase interrupt flag
0 = No effect
1 = Timebase interrupt is enabled.
0 = Timebase interrupt is disabled.
1 = Timebase is enabled.
0 = Timebase is disabled and the counter initialized to 0s.
16-1.
Address: $001C
Do not change TBR2–TBR0 bits while the timebase is enabled (TBON = 1).
Reset:
Read:
Write:
Bit 7
TBIF
0
Figure 16-2. Timebase Control Register (TBCR)
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
Clearing TBON has no effect on the TBIF flag.
= Unimplemented
TBR2
6
0
TBR1
5
0
NOTE
NOTE
TBR0
4
0
TACK
3
R
0
0
= Reserved
TBIE
2
0
TBON
1
0
Freescale Semiconductor
Bit 0
R
0
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