mt48lc16m16a2tg-7e-it Micron Semiconductor Products, mt48lc16m16a2tg-7e-it Datasheet - Page 34

• Manufacturer Part Number: mt48lc16m16a2tg-7e-it
• Description: 256mb X4, X8, X16 Sdram
• Manufacturer: Micron Semiconductor Products

Figure 21:
Figure 22:
Figure 23:
PDF: 09005aef8091e6d1/Source: 09005aef8091e6a8
256MSDRAM_2.fm - Rev. L 10/07 EN
WRITE-to-WRITE
Random WRITE Cycles
WRITE-to-READ
Note:
Data for any WRITE burst may be truncated with a subsequent READ command, and
data for a fixed-length WRITE burst may be immediately followed by a READ command.
After the READ command is registered, the data inputs will be ignored, and WRITEs will
not be executed. An example is shown in Figure 23. Data n + 1 is either the last of a burst
of two or the last desired of a longer burst.
COMMAND
COMMAND
COMMAND
Data for a fixed-length WRITE burst may be followed by, or truncated with, a
PRECHARGE command to the same bank (provided that auto precharge was not acti-
vated), and a full-page WRITE burst may be truncated with a PRECHARGE command to
the same bank. The PRECHARGE command should be issued
ADDRESS
ADDRESS
ADDRESS
DQM is LOW. Each WRITE command may be to any bank.
CLK
CLK
CLK
DQ
DQ
DQ
WRITE
WRITE
BANK,
BANK,
COL n
BANK,
WRITE
COL n
COL n
D
D
T0
T0
D
T0
n
n
IN
n
IN
IN
WRITE
BANK,
n + 1
n + 1
COL a
NOP
NOP
D
T1
D
T1
T1
D
a
IN
IN
IN
TRANSITIONING DATA
WRITE
WRITE
BANK,
BANK,
COL x
COL b
BANK,
COL b
READ
T2
T2
D
T2
D
b
x
IN
IN
34
WRITE
BANK,
COL m
T3
T3
NOP
D
m
IN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
D
T4
OUT
b
DON’T CARE
NOP
T5
b + 1
D
OUT
256Mb: x4, x8, x16 SDRAM
t
WR after the clock edge at
©1999 Micron Technology, Inc. All rights reserved.
Operations