mm74hct240mtcx-nl Fairchild Semiconductor, mm74hct240mtcx-nl Datasheet
mm74hct240mtcx-nl
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mm74hct240mtcx-nl Summary of contents
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... Connection Diagrams Pin Assignments for DIP, SOIC, SOP and TSSOP Top View MM74HCT240 © 2005 Fairchild Semiconductor Corporation The MM74HCT240 is an inverting buffer and the MM74HCT244 is a non-inverting buffer. Each device has two active low enables (1G and 2G), and each enable inde- pendently controls 4 buffers ...
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Truth Tables MM74HCT240 HIGH Level L LOW Level Z Logic Diagrams MM74HCT240 www.fairchildsemi.com MM74HCT244 ...
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Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Output Voltage (V ) OUT Clamp Diode Current ( Output Current, per pin (I ) ...
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AC Electrical Characteristics 5.0V, t MM74HCT240, MM74HCT244 Symbol Parameter Maximum Output PHL PLH Propagation Delay Maximum Output PZL PZH Enable Time Maximum Output PLZ PHZ Disable Time AC ...
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Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...