stlc1510 STMicroelectronics, stlc1510 Datasheet - Page 8

• Manufacturer Part Number: stlc1510
• Description: Northenlite G.lite Dmt Transceiver
• Manufacturer: STMicroelectronics

STLC1510
Table 2. Pad Description
8/40
HPI_Data_2
HPI_Data_1
HPI_Data_0
HPI_Addr_2
HPI_Addr_1
HPI_Addr_0
HPI_CLK
HPI_RWN
HPI_CSN
HPI_ASN
ARM2HP_INT
Misc
VCODC
REF_OUT
INF_OUT
EN_D950_EMU
ARM_MODE
GPIO_7
GPIO_6
GPIO_5
Signal
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
O
I
O
O
I
I
I/O
I/O
I/O
5V Tol CMOS input/ 5V Tol 3.3V
TTL 2mA slew ltd output
5V Tol CMOS input/ 5V Tol 3.3V
TTL 2mA slew ltd output
5V Tol CMOS input/ 5V Tol 3.3V
TTL 2mA slew ltd output
5V Tol. CMOS input
5V Tol. CMOS input
5V Tol. CMOS input
5V Tol. CMOS input
5V Tol. CMOS input
5V Tol. CMOS input
5V Tol. CMOS input
5V Tol 3.3V TTL 2mA slew ltd
output
Analog Input
5V Tol 3.3V TTL 2mA slew ltd
output
5V Tol 3.3V TTL 2mA slew ltd
output
5V Tol CMOS input
5V Tol CMOS input
5V Tol CMOS input /5V Tol 3.3V
TTL 2mA slew ltd output
5V Tol CMOS input / 5V Tol 3.3V
TTL 2mA slew ltd output
5V Tol CMOS input / 5V Tol 3.3V
TTL 2mA slew ltd output
Pad Type
HPI Port Data
HPI Port Data
HPI Port Data
HPI Port Address
HPI Port Address
HPI Port Address
HPI Clock Input
HPI Port Read/WriteN
HPI Port Chip Select
HPI Port Address Strobe Input
Active-low ARM7 To Host Processor
Interrupt
VCO control voltage for stand alone
PLL testing
PLL REF signal at input to phase
detector
PLL INF signal at input to phase
detector
EN_D950_EMU=0; D950 core held in
reset by ARM7, GPIO pin #1,2,3 and
4 are normal mode
EN_D950_EMU=1; D950 core is not
held in reset by ARM7, GPIO pins
#1,2,3 and 4 are dedicated to the
D950 emulator
ARM_MODE=0; Connects external
TAP pins directly to ARM_TAP
ARM_MODE=1; ARM_TAP in daisy
chain configuration after MTAP (i.e.
same as ALPHA configuration)
General Purpose I/O Ports
General Purpose I/O Ports
General Purpose I/O Ports
3
Description
A12
A11
B11
B7
A7
B8
B9
B10
A8
A10
A9
P6
J13
H13
P7
P10
N13
P14
P13
BGA