adc1210s125hn/c1 NXP Semiconductors, adc1210s125hn/c1 Datasheet - Page 15
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adc1210s125hn/c1
Manufacturer Part Number
adc1210s125hn/c1
Description
Single 12-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps; Cmos Or Lvds Ddr Digital Outputs
Manufacturer
NXP Semiconductors
Datasheet
1.ADC1210S125HNC1.pdf
(36 pages)
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NXP Semiconductors
ADC1210S_SER_1
Preliminary data sheet
11.2.3 Transformer
Table 11.
The configuration of the transformer circuit is determined by the input frequency. The
configuration shown in
The configuration shown in
both cases, the choice of transformer will be a compromise between cost and
performance.
Input frequency
3 MHz
70 MHz
170 MHz
Fig 10. Single transformer configuration suitable for baseband applications
Fig 11. Dual transformer configuration suitable for high intermediate frequency
application
RC coupling versus input frequency, typical values
Analog
input
Analog
input
All information provided in this document is subject to legal disclaimers.
100 nF
100 nF
Figure 10
100 nF
Rev. 01 — 9 April 2010
ADT1-1WT
100 nF
ADT1-1WT
Figure 11
R
25 Ω
12 Ω
12 Ω
ADC1210S series; CMOS or LVDS DDR digital outputs
would be suitable for a baseband application.
100 nF
is recommended for high frequency applications. In
50 Ω
50 Ω
ADT1-1WT
100 nF
100 nF
100 nF
ADC1210S series
25 Ω
25 Ω
50 Ω
50 Ω
25 Ω
25 Ω
C
12 pF
8 pF
8 pF
12 Ω
12 Ω
12 pF
100 nF
005aaa044
005aaa045
100 nF
8.2 pF
© NXP B.V. 2010. All rights reserved.
VCM
INM
INP
VCM
INM
INP
15 of 36
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