adc1210s125hn/c1 NXP Semiconductors, adc1210s125hn/c1 Datasheet - Page 6

• Manufacturer Part Number: adc1210s125hn/c1
• Description: Single 12-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps; Cmos Or Lvds Ddr Digital Outputs
• Manufacturer: NXP Semiconductors

NXP Semiconductors
9. Static characteristics
Table 6.
ADC1210S_SER_1
Preliminary data sheet
Symbol
Supplies
V
V
I
I
P
Clock inputs: pins CLKP and CLKM
LVPECL
V
LVDS
V
SINE wave
V
LVCMOS
V
V
Logic inputs: pins PWD and OE
V
V
I
I
Serial peripheral interface: pins CS, SDIO/ODS, SCLK/DFS
V
V
I
I
C
DDA
DDO
IL
IH
IL
IH
DDA
DDO
i(clk)dif
i(clk)dif
i(clk)dif
IL
IH
IL
IH
IL
IH
I
Static characteristics
Parameter
analog supply voltage
output supply voltage
analog supply current
output supply current
power dissipation
differential clock input voltage
differential clock input voltage
differential clock input voltage
LOW-level input voltage
HIGH-level input voltage
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
input capacitance
[1]
All information provided in this document is subject to legal disclaimers.
Conditions
CMOS mode
LVDS DDR mode
f
CMOS mode; f
f
LVDS DDR mode:
f
ADC1210S125;
analog supply only
ADC1210S105;
analog supply only
ADC1210S080;
analog supply only
ADC1210S065;
analog supply only
power-down mode
sleep mode
peak-to-peak
peak-to-peak
peak-to-peak
clk
i
clk
Rev. 01 — 9 April 2010
=70 MHz
= 125 Msps; f
= 125 Msps; f
ADC1210S series; CMOS or LVDS DDR digital outputs
clk
i
i
= 125 Msps;
=70 MHz
=70 MHz
ADC1210S series
-
-
-
0.7V
2
0.7V
-
Min
2.85
1.65
2.85
-
-
-
-
-
-
-
-
±0.8
-
0
<tbd>
−10
0
−10
−50
DDA
DDA
Typ
3.0
1.8
3.0
210
12
39
630
550
430
380
2
40
±1.6
±0.70
±3.0
-
-
-
-
-
-
-
-
-
-
4
© NXP B.V. 2010. All rights reserved.
Max
3.4
3.6
3.6
-
-
-
-
-
-
-
-
-
-
-
-
0.3V
-
0.8
V
<tbd>
+10
0.3V
V
+10
+50
-
DDA
DDA
DDA
DDA
Unit
V
V
V
mA
mA
mA
mW
mW
mW
mW
mW
mW
V
V
V
V
V
V
V
μA
μA
V
V
μA
μA
pF
6 of 36