pca9574 NXP Semiconductors, pca9574 Datasheet - Page 6

• Manufacturer Part Number: pca9574
• Description: 8-bit I2c-bus And Smbus, Level Translating, Low Voltage Gpio With Reset And Interrupt
• Manufacturer: NXP Semiconductors

NXP Semiconductors
7. Functional description
PCA9574_1
Product data sheet
7.1 Device address
7.2 Command register
[1]
Following a START condition the bus master must send the address of the slave it is
accessing and the operation it wants to perform (read or write). The address of the
PCA9574 is shown in
or 42h.
The last bit of the first byte defines the operation to be performed. When set to logic 1 a
read is selected, while logic 0 selects a write operation.
Following the successful acknowledgement of the slave address + R/W bit, the bus master
will send a byte to the PCA9574, which will be stored in the Command register.
The lowest 3 bits are used as a pointer to determine which register will be accessed. Only
a command register code with the 3 least significant bits equal to the 8 allowable values
as defined in
command codes will not be acknowledged. At power-up, this register defaults to 00h, with
the AI bit set to ‘0’, and the lowest 3 bits set to ‘0’.
Fig 5.
Fig 6.
HVQFN16 package die supply ground is connected to both V
be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board
level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad
on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the
PCB in the thermal pad region.
PCA9574 device address
Reset state = 00h
Remark: The Command register does not apply to Software Reset I
Command register
Table 4 “Register summary”
Figure
Auto-Increment flag
Rev. 01 — 15 May 2008
8-bit I
0
5. Slave address pin A0 chooses 1 of 2 slave addresses: 40h
AI
1
2
C-bus and SMBus, level translating, low voltage GPIO
X
slave address
0
fixed
X
0
X
will be acknowledged. Reserved or undefined
0
X
0
register address
D2
A0 R/W
hardware selectable
D1
SS
pin and exposed center pad. V
D0
002aad055
002aad056
2
C-bus address.
PCA9574
© NXP B.V. 2008. All rights reserved.
SS
pin must
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