pca9574 NXP Semiconductors, pca9574 Datasheet - Page 7

• Manufacturer Part Number: pca9574
• Description: 8-bit I2c-bus And Smbus, Level Translating, Low Voltage Gpio With Reset And Interrupt
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA9574_1
Product data sheet
7.5.1 Register 0 - Input port register
7.3 Register definitions
7.4 Writing to port registers
7.5 Reading the port registers
Table 4.
Data is transmitted to the PCA9574 by sending the device address and setting the least
significant bit to logic 0 (see
the address and determines which register will receive the data following the command
byte. Each 8-bit register may be updated independently of the other registers.
In order to read data from the PCA9574, the bus master must first send the PCA9574
address with the least significant bit set to a logic 0 (see
command byte is sent after the address and determines which register will be accessed.
After a restart, the device address is sent again but this time, the least significant bit is set
to logic 1. Data from the register defined by the command byte will then be sent by the
PCA9574. Data is clocked into the register on the falling edge of the acknowledge clock
pulse. After the first byte is read, additional bytes may be read using the auto-increment
feature.
This register is read-only. It reflects the incoming logic levels of the pins, regardless of
whether the pin is defined as an input or an output by the Configuration register. Writes to
this register will be acknowledged but will have no effect.
The default ‘X’ is determined by the externally applied logic level.
Table 5.
Register
number
00h
01h
02h
03h
04h
05h
06h
07h
Bit
7
6
5
4
3
2
1
0
Symbol
I0.7
I0.6
I0.5
I0.4
I0.3
I0.2
I0.1
I0.0
Register summary
Register 0 - Input port register (address 00h) bit description
D2
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
Access
read only
read only
read only
read only
read only
read only
read only
read only
Rev. 01 — 15 May 2008
D0
0
1
0
1
0
1
0
1
8-bit I
Figure 5
2
Name
IN
INVRT
BKEN
PUPD
CFG
OUT
MSK
INTS
Value
X
X
X
X
X
X
X
X
C-bus and SMBus, level translating, low voltage GPIO
for device address). The command byte is sent after
Type
read only
read/write
read/write
read/write
read/write
read/write
read/write
read only
Description
determined by externally applied logic level
Function
Input port register
Polarity inversion register
Bus-hold enable register
Pull-up/pull-down selector register
Port configuration register
Output port register
Interrupt mask register
Interrupt status register
Figure 5
for device address). The
PCA9574
© NXP B.V. 2008. All rights reserved.
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