adv7180 Analog Devices, Inc., adv7180 Datasheet - Page 17

• Manufacturer Part Number: adv7180
• Description: 10-bit, 4 X Oversampling Sdtv Video Decoder
• Manufacturer: Analog Devices, Inc.

ANALOG INPUT MUXING
The ADV7180 has an integrated analog muxing section that
allows more than one source of video signal to be connected to
the decoder. Figure 9 and Figure 10 outline the overall structure
of the input muxing provided in the ADV7180.
A maximum of six CVBS inputs can be connected to and
decoded by the ADV7180BSTZ (64-lead LQFP) and a
maximum of three for ADV7180BCPZ (40-lead LFCSP). As
shown in the Pin Configurations and Function Description
section, these analog input pins lie in close proximity to one
another. This calls for a careful design of the PCB layout; for
example, ground shielding between all signals should be routed
through tracks that are physically close together. It is strongly
recommended to connect any unused analog input pins to
AGND to act as a shield.
Table 12. Manual Mux Settings for the ADC (MAN_MUX_EN Must be Set to 1)
MUX_0[3:0]
000
001
010
011
100
101
110
111
Note the following:
•
•
•
CVBS can only be processed by MUX_0.
Y/C can only be processed by MUX_0 and MUX_1, respectively.
YPrPb can only be processed by MUX_0, MUX_1, and MUX_2, respectively.
LQFP-64
No connect
A
A
A
A
A
A
No connect
IN
IN
IN
IN
IN
IN
1
2
3
4
5
6
ADC Connected to
LFCSP-40
No connect
A
No connect
No connect
A
A
No connect
No connect
IN
IN
IN
1
2
3
MUX_1[3:0]
000
001
100
101
111
010
011
110
Rev. B | Page 17 of 112
LQFP-64
No connect
No connect
No connect
A
A
A
A
No connect
IN
IN
IN
IN
3
4
5
6
ADC Connected to
MAN_MUX_EN, Manual Input Muxing Enable,
Address 0xC4 [7]
To configure the ADV7180 analog muxing section, the user
must select the analog input A
A
ADC. MAN_MUX_EN must be set to 1 to enable the following
muxing blocks:
•
•
•
The three mux sections are controlled by the signal buses
SW_0/1/2[3:0]. Table 12 explains the control words used.
The input signal that contains the timing information (HS and
VS) must be processed by MUX_0. For example, in a Y/C input
configuration, MUX0 should be connected to the Y channel
and MUX1 to the C channel. When one or more muxes are not
used to process video, such as CVBS input, the idle mux and
associated channel clamps and buffers should be powered down
(see the description of Register 0x3A in Table 103).
IN
1 to A
MUX_0[3:0], ADC Mux Configuration, Address 0xC3 [3:0]
MUX_1[3:0], ADC Mux Configuration, Address 0xC3 [7:4]
MUX_2[3:0], ADC Mux Configuration, Address 0xC4 [3:0]
LFCSP-40
No connect
No connect
No connect
No connect
A
A
No connect
No connect
IN
IN
2
3
IN
3 (ADV7180BCPZ) that is to be processed by the
MUX_2[3:0]
000
001
010
011
100
101
110
111
IN
1 to A
LQFP-64
No connect
No connect
No connect
No connect
A
No connect
A
A
IN
IN
IN
IN
2
5
6
6 (ADV7180BSTZ) or
ADC Connected to
ADV7180
LFCSP-40
No connect
No connect
No connect
No connect
No connect
A
No connect
No connect
IN
3