adv7180 Analog Devices, Inc., adv7180 Datasheet - Page 33

• Manufacturer Part Number: adv7180
• Description: 10-bit, 4 X Oversampling Sdtv Video Decoder
• Manufacturer: Analog Devices, Inc.

Luma Gain
LAGC[2:0], Luma Automatic Gain Control,
Address 0x2C [6:4]
The luma automatic gain control mode bits select the operating
mode for the gain control in the luma path.
There are internal parameters (Analog Devices proprietary
algorithms) to customize the peak white gain control. Contact
local Analog Devices field applications engineers or local
Analog Devices distributor for more information.
Table 35. LAGC Function
LAGC[2:0]
000
001
010 (default)
011
100
101
110
111
LAGT[1:0], Luma Automatic Gain Timing,
Address 0x2F [7:6]
The luma automatic gain timing register allows the user to
influence the tracking speed of the luminance automatic gain
control. Note that this register only has an effect if the
LAGC[2:0] register is set to 001, 010, 011, or 100 (automatic
gain control modes).
If peak white AGC is enabled and active (see the STATUS_1[7:0],
Address 0x10 [7:0] section), the actual gain update speed is
dictated by the peak white AGC loop and, as a result, the LAGT
settings have no effect. As soon as the part leaves peak white
AGC, LAGT becomes relevant again.
The update speed for the peak white algorithm can be
customized by the use of internal parameters. Contact Analog
Devices local field engineers for more information.
Table 36. LAGT Function
LAGT[1:0]
00
01
10
11 (default)
Description
Manual fixed gain (use LMG[11:0])
Reserved
AGC (blank level to sync tip), peak white
algorithm on
Reserved
AGC (blank level to sync tip), peak white
algorithm off
Reserved
Reserved
Freeze gain
Description
Slow (TC = 2 sec)
Medium (TC = 1 sec)
Fast (TC = 0.2 sec)
Adaptive
Rev. B | Page 33 of 112
LG[11:0], Luma Gain, Address 0x2F [3:0],
Address 0x30 [7:0]; LMG[11:0], Luma Manual Gain,
Address 0x2F [3:0], Address 0x30 [7:0]
Luma gain [11:0] is a dual-function register. If all of these
registers are written to, a desired manual luma gain can be
programmed. This gain becomes active if the LAGC[2:0] mode
is switched to manual fixed gain. Equation 1 shows how to
calculate a desired gain.
If read back, this register returns the current gain value.
Depending on the setting in the LAGC[2:0] bits, the value is
one of the following:
•
•
Table 37. LG/LMG Function
LG[11:0]/LMG[11:0]
LMG[11:0] = X
LG[11:0]
For example, with a 525i input applied, program the ADV7180
into manual fixed gain mode with a desired gain of 0.89 as
follows:
1.
2.
3.
4.
5.
Luma
Luma
Luma
Luma manual gain value (LAGC[2:0] set to luma manual
gain mode)
Luma automatic gain value (LAGC[2:0] set to any of the
automatic modes)
Use Equation 1 to convert the gain:
0.89 × 1410 = 1254.9
Truncate to integer value:
= 1255d
Convert to hexadecimal:
1255d = 0x04E7
Split into two registers and program:
Luma Gain Control 1 [3:0] = 0x4
Luma Gain Control 2 [7:0] = 0xE7
Enable manual fixed gain mode:
Set LAGC[2:0] to 000
Gain
Gain
Gain
(
(
(
PAL
525i
NTSC
/
)
625
≅
)
≅
(
i
1024
)
(
Read/Write
Write
Read
≅
1024
≅
. 0
(
66
<
1024
<
LMG
K
LMG
<
. 2
1410
66
LMG
1470
[
11
[
11
Description
Manual gain for luma
path
Actual used gain
1535
:
] 0
[
:
11
] 0
≤
:
≤
] 0
4095
4095
≤
4095
ADV7180
)
)
≅
≅
. 0
)
0
72
7 .
K
K
(1)
2
. 2
9 .
78