adsp-2186n Analog Devices, Inc., adsp-2186n Datasheet - Page 28

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adsp-2186n

Manufacturer Part Number
adsp-2186n
Description
Dsp Microcomputer
Manufacturer
Analog Devices, Inc.
Datasheet

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ADSP-218xN
Clock Signals and Reset
Table 15. Clock Signals and Reset
1
Parameter
Timing Requirements:
t
t
t
Switching Characteristics:
t
t
t
Control Signals Timing Requirements:
t
t
t
Applies after power-up sequence is complete. Internal phase lock loop requires no more than 2000 CLKIN cycles, assuming stable CLKIN (not including crystal oscillator
CKI
CKIL
CKIH
CKL
CKH
CKOH
RSP
MS
MH
start-up time).
CLKIN Period
CLKIN Width Low
CLKIN Width High
CLKOUT Width Low
CLKOUT Width High
CLKIN High to CLKOUT High
RESET Width Low
Mode Setup before RESET High
Mode Hold after RESET High
MODE A D
CLKOUT
RESET
CLKIN
Rev. A | Page 28 of 48 | August 2006
Figure 26. Clock Signals and Reset
t
t
CKIL
RSP
t
t
CKI
MS
t
CKL
t
MH
t
CKOH
t
CKH
t
CKIH
Min
25
8
8
0.5t
0.5t
0
5t
7
5
CK
1
CK
CK
– 3
– 3
Max
40
8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns

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