adsp-2186n Analog Devices, Inc., adsp-2186n Datasheet - Page 38

• Manufacturer Part Number: adsp-2186n
• Description: Dsp Microcomputer
• Manufacturer: Analog Devices, Inc.

ADSP-218xN
IDMA Read, Short Read Cycle
Table 25. IDMA Read, Short Read Cycle
1
2
3
4
5
6
Parameter
Timing Requirements:
t
t
t
Switching Characteristics:
t
t
t
t
t
Short Read Only must be disabled in the IDMA overlay memory mapped register. This mode is disabled by clearing (=0) Bit 14 of the IDMA overlay register, and is
Consider using the Short Read Only mode, instead, because Short Read mode is not applicable at high clock frequencies.
Start of Read = IS Low and IRD Low.
DM Read or first half of PM Read.
Second half of PM Read.
End of Read = IS High or IRD High.
IKR
IRP1
IRP2
IKHR
IKDH
IKDD
IRDE
IRDV
disabled by default upon reset.
1, 2
IACK Low Before Start of Read
Duration of Read (DM/PM1)
Duration of Read (PM2)
IACK High After Start of Read
IAD15–0 Data Hold After End of Read
IAD15–0 Data Disabled After End of Read
IAD15–0 Previous Data Enabled After Start of Read
IAD15–0 Previous Data Valid After Start of Read
IAD15–0
IACK
IRD
5
IS
4
3
3
Figure 36. IDMA Read, Short Read Cycle
t
IKR
Rev. A | Page 38 of 48 | August 2006
t
IRDE
6
6
t
t
IKHR
IRDV
t
IRP
PREVIOUS
DATA
t
IKDD
Min
0
10
10
0
0
t
IKDH
Max
2t
t
10
10
10
CK
CK
– 5
– 5
ns
Unit
ns
ns
ns
ns
ns
ns
ns