adsp-2165ks-80 Analog Devices, Inc., adsp-2165ks-80 Datasheet - Page 23

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adsp-2165ks-80

Manufacturer Part Number
adsp-2165ks-80
Description
Dsp Microcomputers With Rom
Manufacturer
Analog Devices, Inc.
Datasheet
TIMING PARAMETERS (ADSP-2161/ADSP-2163/ADSP-2165)
INTERRUPTS AND FLAGS
Parameter
Timing Requirements:
t
t
t
Switching Characteristics:
t
t
NOTES
1
2
3
4
REV. 0
IRQx = IRQ0, IRQ1, and IRQ2.
If IRQx and FI inputs meet t
Edge-sensitive interrupts require pulsewidths greater than 10 ns. Level-sensitive interrupts must be held low until serviced.
For 25 MHz only, the maximum frequency dependency for t
IFS
IFS
IFH
FOH
FOD
following cycle. (Refer to the “Interrupt Controller” section in Chapter 3, Program Control, of the ADSP-2100 Family User’s Manual, Third Edition for further
information on interrupt servicing.)
IRQx
CLKOUT Low
IRQx
CLKOUT Low
IRQx
High
FO Hold After CLKOUT High
FO Delay from CLKOUT High
2, 3
1
1
1
or FI Setup Before
or FI Setup Before
or FI Hold After CLKOUT
2, 3
2, 3
IFS
and t
IFH
setup/hold requirements, they will be recognized during the current clock cycle; otherwise they will be recognized during the
OUTPUT(S)
CLKOUT
FLAG
IRQx
FI
Min
30
33
15
0
16.67 MHz
FOD
Figure 22. Interrupts and Flags
= 12 ns.
t
FOH
15
Max
t
FOD
–23–
Min
27.5
30.5
12.5
0
t
20 MHz
IFH
Max
15
t
IFS
25
28
Min
10
0
25 MHz
Max
12
4
Frequency Dependency
Min
0.25t
0.25t
0.25t
0
CK
CK
CK
+ 15
+ 18
ADSP-216x
Max
15
4
Unit
ns
ns
ns
ns
ns

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