saa7803 NXP Semiconductors, saa7803 Datasheet - Page 26
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saa7803
Manufacturer Part Number
saa7803
Description
Saa7803 One Chip Cd Audio Device
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7803.pdf
(74 pages)
- Current page: 26 of 74
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Philips Semiconductors
9397 750 13695
Objective data sheet
Fig 16. Bit detection
conditioning
6.6.5.2 Bit detector
signal
from
The bit detector block contains the slice level circuitry, a noise filter to limit HF-EFM signal
noise contribution, an equalizer, a zero-transition detector, a run length pushback circuit, a
digital PLL and jitter measurement logic.
All processing is done using the bit clock, and bandwidths are proportional to the channel
bit rate. To achieve this, RF data is resampled in the system clock domain to the bit clock
domain by using a sample-rate convertor. Blocks can be configured under microprocessor
control and are described in detail in the next paragraphs.
Noise filter:
the bandwidth of the incoming signal to
Slice level determination:
incoming signal asymmetry component. Bandwidth of the slice level determination circuit
is programmable via register SlicerBandwidth. Also the higher bandwidths for use after a
defect (see
proportional to the channel bit clock frequency. The slice level, or asymmetry, can be read
back via register SlicerAssym.
Equalizer:
frequency content of the incoming signal.
A five-tap presentable, asymmetrical equalizer is built in. The equalizer block diagram is
given in
Pass band: 0f
Stop band: 0.28f
Rejection: 28 dB.
SRC
Figure
DETERMINE
In the bit detection circuit, a programmable equalizer is used, it boosts the high
Section “Defect
LEVEL
SLICE
The digital noise filter runs on the channel bit clock frequency f
FILTER
NOISE
17.
b
to 0.22f
b
to (f
clocked on PLL clock
Rev. 01 — 19 April 2005
b
DIGITAL
EQUALIZER
b
PLL
DIGITAL
0.28f
The slice level determination circuit compensates the
Detector”) are programmed in this register. The bandwidth is
b
)
MEASUREMENT
1
4
JITTER
TRANSITION
of the channel bit clock frequency:
PUSHBACK
RMS
DETECT
ZERO
RL2
PLL frequency
jitter value
slice level
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
to
demodulator
multiplex
One chip CD audio device
001aab760
40
SAA7803
MEAS
b
. It will limit
26 of 74
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