saa7803 NXP Semiconductors, saa7803 Datasheet - Page 30

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saa7803

Manufacturer Part Number
saa7803
Description
Saa7803 One Chip Cd Audio Device
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
9397 750 13695
Objective data sheet
6.6.5.4 Run length 2 pushback detector
6.6.5.5 Available signals for monitoring
If this circuit is switched on, all run length 1 (RL1) and run length 2 (RL2) symbols (invalid
run lengths) are pushed back to run length 3 (RL3). For RL2s, the circuit will determine
the transition that was most likely to be in error, and shift transition on that edge. This
feature should always be turned on, but can be deselected via register RL2PushBack.
The operation of the bit detector can be monitored by the microprocessor and using an
external pin. Several signals are made available for measurement.
PLL frequency signal:
Monitoring via the microprocessor is done by reading the register PLLIntegrator.
Asymmetry signal:
signal. The signal is in 2-complement form and can be read from register SlicerAssym.
Jitter signal:
in register PLLJitter.
The jitter measurement is done in two steps.
First, the distance between the EFM zero transition and the bit clock zero transition is
measured.
Table 6:
Second, the calculated jitter for the zero transition is averaged using a 10-bit low-pass
filter. The top 8 bits of the filter output can be read back from register PLLJitter. To obtain
the jitter in % of the channel bit clock, the following formula applies:
This jitter measurement is also available via the telemetry signal on pin MEAS. On this
signal, the full 10-bit output of the filter is available - see
measurement signal on MEAS
It is also possible to read out an average jitter value via register PLLAverageJitter. This
value is an average over a period of 8000 bit clocks on the normal jitter value. The formula
to transform this into % is the same:
average jitter
Distance ( f
<
2
4
>
jitter
16
16
2
6
16
16
to
to
4
6
=
16
16
Jitter input calculation
------------------------------------------ -
jitter 7:0
bit
A jitter measurement is done internally. The zero-crossing jitter is available
)
=
1024
average jitter[7:0] 2.83
----------------------------------------------------------------- -
The second signal that can be monitored is the 8-bit asymmetry
2.83
Rev. 01 — 19 April 2005
The first signal that can be monitored is the PLL frequency signal.
100
1024
Average distance (bit clocks) Jitter filter input (5-bit
1
3
5
7
pin”.
16
16
16
16
%
100
%
Section 6.6.5.6 “Format of the
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
decimal integer)
1
9
25
49
One chip CD audio device
SAA7803
30 of 74

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