saa7803 NXP Semiconductors, saa7803 Datasheet - Page 28
saa7803
Manufacturer Part Number
saa7803
Description
Saa7803 One Chip Cd Audio Device
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7803.pdf
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Philips Semiconductors
9397 750 13695
Objective data sheet
The frequencies f
higher bandwidths for use after a defect (see
programmed in register PLLBandWidthHigh.
When the PLL is in-lock the recovered PLL clock equals the channel bit clock.
Detection of PLL lock:
detected syncs. This means that the sync detection is actually doing the control of the
automatic PLL locking.
The PLL switches from outer lock to inner lock when successive syncs are detected to be
588
window). The number of missed winsyncs is kept in a 3 bit confidence counter, and the
PLL will go out of outer lock when 7 consecutive out-of-window syncs are found.
The PLL switches from inner lock to in-lock when successive syncs are detected 588
channel bits apart. The number of consecutive missed syncs is kept in a bit counter, and
saturates on either 16 or 61, depending on the value of bit lock 16 or 61 in register
DemodControl. When the saturation level is reached, the PLL is set out of lock.
The PLL frequency (inner) and phase (in) lock status can be read out in register
PLLLockStatus.
PLL outer lock aid:
the PLL within the range of the inner lock aid. The PLL will first regulate it’s frequency
based on detecting RL3s as the smallest possible RLs (fast but rough regulation), and
next on detecting RL11s as the largest possible RLs (slow but more accurate).
PLL inner lock aid:
PLL frequency to the phase-lock point. It will regulate the PLL frequency such that
588 bits are detected between 2 EFM-syncs.
Fig 18. PLL Bode diagram
25 channel bits apart. Internally this is also called a winsync (sync falls in a wider
f
f
f
1
0
LPF
: IntegratorXover; controlled via K
: PLLBandwidth; controlled via K
: LPBandwidth; controlled via K
0
, f
1
The inner lock aid has a capture range of 4 %, and will bring the
The outer lock aid has no limitation on capture range, and will bring
and f
Rev. 01 — 19 April 2005
The PLL locking state is determined by the distance between
LPF
loop gain
are programmable using register PLLBandWidth. The
P
I
F
.
.
.
f
1
Section “Defect Detector” on page
f
0
f
LPF
frequency
001aab762
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
One chip CD audio device
SAA7803
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