mc68hc908gr8b Freescale Semiconductor, Inc, mc68hc908gr8b Datasheet - Page 109

• Manufacturer Part Number: mc68hc908gr8b
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 11
Low-Voltage Inhibit (LVI)
11.1 Introduction
This section describes the low-voltage inhibit (LVI) module, which monitors the voltage on the V
and will force a reset when the V
11.2 Features
Features of the LVI module include:
11.3 Functional Description
Figure 11-1
contains a bandgap reference circuit and comparator. The LVI power disable bit, LVIPWRD, is always
clear to enable the LVI to monitor V
enable the LVI module to generate a reset when V
mode bit, LVISTOP, is always clear to enable the LVI to operate in stop mode. The LVI 5-V or 3-V trip
point bit, LVI5OR3, is always clear to enable the trip point voltage, V
operation. The actual trip points are shown in
LVISTOP, LVIPWRD, LVI5OR3, and LVIRSTD are in the configuration register (CONFIG1). See
Figure 5-2. Configuration Register 1 (CONFIG1)
reset occurs, the MCU remains in reset until V
to exit reset. See
and the LVI. The output of the comparator controls the state of the LVIOUT flag in the LVI status register
(LVISR).
An LVI reset also drives the RST pin low to provide low-voltage protection to external peripheral devices.
11.3.1 Polled LVI Operation
Polled LVI operation is not available on the MC68HC908GR8B.
11.3.2 Forced Reset Operation
In applications that require V
the MCU when V
enable the LVI module and to enable LVI resets.
Freescale Semiconductor
•
•
LVI reset
Stop mode operation
shows the structure of the LVI module. The LVI is enabled out of reset. The LVI module
After a power-on reset (POR) the LVI’s default mode of operation is 3 V.
DD
14.3.2.5 Low-Voltage Inhibit (LVI) Reset
falls below the V
DD
to remain above the V
DD
MC68HC908GR8B Data Sheet, Rev. 3.0
DD
voltage falls below the LVI trip falling voltage, V
TRIPF
voltage. The LVI reset disable bit, LVIRSTD, is always clear to
level. The LVIPWRD and LVIRSTD bits are always clear to
Chapter 19 Electrical
DD
NOTE
for details of the LVI’s configuration bits. Once an LVI
DD
rises above a voltage, V
falls below a voltage, V
TRIPF
for details of the interaction between the SIM
level, LVI resets allow the LVI module to reset
Specifications.
TRIPF
, to be configured for 3-V
TRIPR
TRIPF
, which causes the MCU
. The LVI enable in stop
TRIPF
.
DD
pin
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