mc68hc908gr8b Freescale Semiconductor, Inc, mc68hc908gr8b Datasheet - Page 188

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mc68hc908gr8b

Manufacturer Part Number
mc68hc908gr8b
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Serial Peripheral Interface (SPI) Module
When enabled, the SPI controls data direction of the SPSCK pin regardless of the state of the data
direction register of the shared I/O port.
15.11.4 SS (Slave Select)
The SS pin has various functions depending on the current state of the SPI. For an SPI configured as a
slave, SS is used to select a slave. For CPHA = 0, SS is used to define the start of a transmission. (See
15.4 Transmission
high and low between each byte transmitted for the CPHA = 0 format. However, it can remain low
between transmissions for the CPHA = 1 format. See
When an SPI is configured as a slave, the SS pin is always configured as an input. It cannot be used as
a general-purpose I/O regardless of the state of the MODFEN control bit. However, the MODFEN bit can
still prevent the state of SS from creating a MODF error. See
When an SPI is configured as a master, the SS input can be used in conjunction with the MODF flag to
prevent multiple masters from driving MOSI and SPSCK. (See
the SS pin to set the MODF flag, the MODFEN bit in the SPSCK register must be set. If MODFEN is 0 for
an SPI master, the SS pin can be used as a general-purpose I/O under the control of the data direction
register of the shared I/O port. When MODFEN is 1, SS is an input-only pin to the SPI regardless of the
state of the data direction register of the shared I/O port.
The CPU can always read the state of the SS pin by configuring the appropriate pin as an input and
reading the port data register. See
188
A high on the SS pin of a slave SPI puts the MISO pin in a high-impedance
state. The slave SPI ignores all incoming SPSCK clocks, even if it was
already in the middle of a transmission.
MASTER SS
SPE
1. X = Don’t care
MISO/MOSI
SLAVE SS
SLAVE SS
0
1
1
1
CPHA = 0
CPHA = 1
Formats.) Since it is used to indicate the start of a transmission, SS must be toggled
SPMSTR
X
(1))
0
1
1
MODFEN
Table
MC68HC908GR8B Data Sheet, Rev. 3.0
Figure 15-13. CPHA/SS Timing
BYTE 1
Table 15-2. SPI Configuration
X
X
0
1
15-2.
Master without MODF
SPI Configuration
Master with MODF
NOTE
Not enabled
Slave
Figure
BYTE 2
15-13.
15.12.2 SPI Status and Control Register.
15.6.2 Mode Fault Error.)
General-purpose I/O;
General-purpose I/O;
Function of SS Pin
SS ignored by SPI
SS ignored by SPI
Input-only to SPI
Input-only to SPI
BYTE 3
Freescale Semiconductor
For the state of

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