mc68hc908gr8b Freescale Semiconductor, Inc, mc68hc908gr8b Datasheet - Page 116

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mc68hc908gr8b

Manufacturer Part Number
mc68hc908gr8b
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Input/Output (I/O) Ports
PTA3–PTA0 — Port A Data Bits
KBD3–KBD0 — Keyboard Inputs
12.2.2 Data Direction Register A
Data direction register A (DDRA) determines whether each port A pin is an input or an output. Writing a 1
to a DDRA bit enables the output buffer for the corresponding port A pin; a 0 disables the output buffer.
DDRA3–DDRA0 — Data Direction Register A Bits
Figure 12-4
116
These read/write bits are software programmable. Data direction of each port A pin is under the control
of the corresponding bit in data direction register A. Reset has no effect on port A data.
The keyboard interrupt enable bits, KBIE3–KBIE0, in the keyboard interrupt control register (KBICR)
enable the port A pins as external interrupt pins. See
These read/write bits control port A data direction. Reset clears DDRA3–DDRA0, configuring all port
A pins as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
shows the port A I/O logic.
Address:
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Reset:
Read:
Write:
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
$0004
Bit 7
0
0
Figure 12-3. Data Direction Register A (DDRA)
= Unimplemented
6
0
0
RESET
MC68HC908GR8B Data Sheet, Rev. 3.0
Figure 12-4. Port A I/O Circuit
5
0
0
NOTE
DDRAx
PTAx
4
0
0
Chapter 9 Keyboard Interrupt Module (KBI).
DDRA3
3
0
PTAPUEx
DDRA2
2
0
DDRA1
1
0
V
DD
INTERNAL
PULLUP
DEVICE
Freescale Semiconductor
DDRA0
Bit 0
PTAx
0

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