mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 347

• Manufacturer Part Number: mc68hc908as60
• Description: Mc68hc908as60 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

21.5.4.6 Idle Bus
MC68HC908AS60 — Rev. 1.0
See
beginning the SOF symbol of the next message occurs between c
and d, the current symbol will be considered a valid EOF symbol
followed by a valid inter-frame separation symbol (IFS). All nodes must
wait until a valid IFS symbol time has expired before beginning
transmission. However, due to variations in clock frequencies and bus
loading, some nodes may recognize a valid IFS symbol before others
and immediately begin transmitting. Therefore, any time a node waiting
to transmit detects a passive-to-active transition once a valid EOF has
been detected, it should immediately begin transmission, initiating the
arbitration process.
In
the start-of-frame (SOF) symbol of the next message does not occur
before d, the bus is considered to be idle, and any node wishing to
transmit a message may do so immediately.
ACTIVE
PASSIVE
ACTIVE
PASSIVE
Figure 21-9
Freescale Semiconductor, Inc.
Figure 21-9
For More Information On This Product,
Byte Data Link Controller-Digital (BDLC-D)
Go to: www.freescale.com
Figure 21-9. J1850 VPW Received Passive
(2), if the passive-to-active received transition beginning
280 s
(2). If the passive-to-active received transition
EOF and IFS Symbol Times
300 s
a
Byte Data Link Controller-Digital (BDLC-D)
b
c
d
BDLC MUX Interface
(1) VALID EOF SYMBOL
(2) VALID EOF+
IFS SYMBOL
Technical Data