mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 68

• Manufacturer Part Number: mc68hc908as60
• Description: Mc68hc908as60 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

FLASH-1 Memory
4.7 FLASH Program/Margin Read Operation
Technical Data
NOTE:
NOTE:
NOTE:
While these operations must be performed in the order shown, other
unrelated operations may occur between the steps.
Table 4-2
erase operation.
In step 2 of the erase operation, the cared addresses are latched and
used to determine the location of the block to be erased. For instance,
with BLK0 = BLK1 = 0, writing to any FLASH address in the range
$8000–$FFFF will enable the full-array erase.
To ensure the timing requirements of the high-voltage erase and
program mode of the FLASH memory, interrupts must be masked
(interrupt mask bit of CCR = 1) when the HVEN bit is set.
After a total of eight program operations have been applied to a row, the
row must be erased before further programming to avoid program
disturb. An erased byte will read $00.
Programming of the FLASH memory is done on a page basis. A page
consists of eight consecutive bytes starting from address $XXX0 or
$XXX8. The purpose of the margin read mode is to ensure that data has
been programmed with sufficient margin for long-term data retention.
While performing a margin read, the operation is the same as for
7. Wait for a time, t
8. Clear the ERASE bit.
9. After time t
Freescale Semiconductor, Inc.
BLK1
For More Information On This Product,
0
0
1
1
shows the various block sizes which can be erased in one
Go to: www.freescale.com
BLK0
FLASH-1 Memory
HVD
0
1
0
1
Table 4-2. Erase Block Sizes
, the memory can be accessed in read mode again.
Kill
, for the high voltages to dissipate.
One-half array: 16 Kbytes (A14)
Eight rows: 512 bytes (A14–A9)
Block Size, Addresses Cared
Single row: 64 bytes (A14–A6)
Full array: 30 Kbytes
MC68HC908AS60 — Rev. 1.0