mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 205
mc68hc912dg128
Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC912DG128.pdf
(452 pages)
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PORTP — Port P Data Register
DDRP — Port P Data Direction Register
MC68HC912DG128 — Rev 3.0
MOTOROLA
RESET:
RESET:
PWM
DDP7
Bit 7
Bit 7
PP7
–
–
0
DDP6
PP6
6
–
–
6
0
PORTP can be read anytime.
PWM functions share port P pins 3 to 0 and take precedence over the
general-purpose port when enabled.
When configured as input, a read will return the pin level. Port P[7:4] will
read as zero because there are no available external pins.
When configured as output, a read will return the latched output data.
Port P[7:4] will read the last value written.
A write will drive associated pins only if configured for output and the
corresponding PWM channel is not enabled.
After reset, all pins are general-purpose, high-impedance inputs.
DDRP determines pin direction of port P when used for general-purpose
I/O.
Read and write anytime.
DDRP[7:4] — Data Direction Port P pin 7–4
DDRP[3:0] — Data Direction Port P pin 3–0
Freescale Semiconductor, Inc.
Serve as memory locations since there are no corresponding port pins.
For More Information On This Product,
0 = I/O pin configured as high impedance input
1 = I/O pin configured for output.
DDP5
PP5
5
0
5
–
–
Go to: www.freescale.com
Pulse Width Modulator
DDP4
PP4
4
–
–
4
0
PWM3
DDP3
PP3
3
–
3
0
PWM2
DDP2
PP2
2
–
2
0
PWM1
DDP1
PP1
1
–
1
0
PWM Register Description
Pulse Width Modulator
PWM0
DDP0
Bit 0
Bit 0
PP0
–
0
Technical Data
$0056
$0057
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