mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 49

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

3.4.15 Clock generation module test (CGMTST)
MC68HC912DG128 — Rev 3.0
MOTOROLA
ADDR[15:8]
DATA[15:8]
ADDR[7:0]
Pin Name
DATA[7:0]
CGMTST
LSTRB/
IPIPE1,
RESET
MODB/
MODA/
TAGLO
EXTAL
IPIPE0
ECLK
ECLK
XTAL
DBE
CAL
R/W
IRQ
PE6, PE5
Shared
PB[7:0]
PA[7:0]
port
PE7
PE7
PE7
PE6
PE4
PE3
PE2
PE1
-
-
-
The CGMTST pin (PE6) is the output of the clocks tested when CGMTE
bit is set in PEAR register. The PIPOE bit must be cleared for the clocks
to be tested.
Number
112-pin
31–24
64–57
37, 38
Pin
47
48
46
36
36
36
37
39
53
54
55
Freescale Semiconductor, Inc.
Table 3-2. Signal Description Summary
For More Information On This Product,
Crystal driver and external clock input pins. On reset all the device clocks
An active low bidirectional control signal, RESET acts as an input to
External bus pins share function with general-purpose I/O ports A and B.
Data bus control and, in expanded mode, enables the drive control of
Inverted E clock used to latch the address.
CAL is the output of the Slow Mode programmable clock divider,
Clock generation module test output.
State of mode select pins during reset determine the initial operating
E Clock is the output connection for the external bus clock. ECLK is used
Low byte strobe (0 = low byte valid), in all modes this pin can be used as
Indicates direction of data on expansion bus. Shares function with
Maskable interrupt request input provides a means of applying
are derived from the EXTAL input frequency. XTAL is the crystal output.
initialize the MCU to a known start-up state, and an output when COP or
clock monitor causes a reset.
In single chip modes, the pins can be used for I/O. In expanded modes,
the pins are used for the external buses.
external buses during external reads.
SLWCLK, and is used as a calibration reference for functions such as
time of day. It is overridden when DBE function is enabled. It always has
a 50% duty.
mode of the MCU. After reset, MODB and MODA can be configured as
instruction queue tracking signals IPIPE1 and IPIPE0 or as general-
purpose I/O pins.
as a timing reference and for address demultiplexing.
I/O. The low strobe function is the exclusive-NOR of A0 and the internal
SZ8 signal. (The SZ8 internal signal indicates the size 16/8 access.) Pin
function TAGLO used in instruction tagging. See
general-purpose I/O. Read/write in expanded modes.
asynchronous interrupt requests to the MCU. Either falling edge-
sensitive triggering or level-sensitive triggering is program selectable
(INTCR register).
Pinout and Signal Descriptions
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