mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 300

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mc68hc912dg128

Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Analog-to-Digital Converter
ATD0CTL2/ATD1CTL2 — ATD Control Register 2
Technical Data
300
RESET:
ADPU
Bit 7
0
AFFC
6
0
The ATD control register 2 and 3 are used to select the power up mode,
interrupt control, and freeze control. Writes to these registers abort any
current conversion sequence.
Read or write anytime except ASCIF bit, which cannot be written.
Bit positions ATDCTL2[4:2] and ATDCTL3[7:2] are unused and always
read as zeros.
AFFC — ATD Fast Flag Clear All
AWAI — ATD Wait Mode
ADPU — ATD Disable
Freescale Semiconductor, Inc.
Software can disable the clock signal to the A/D converter and power
down the analog circuits to reduce power consumption. When reset
to zero, the ADPU bit aborts any conversion sequence in progress.
Because the bias currents to the analog circuits are turned off, the
ATD requires a period of recovery time to stabilize the analog circuits
after setting the ADPU bit.
For More Information On This Product,
0 = Disables the ATD, including the analog section for reduction in
1 = Allows the ATD to function normally.
0 = ATD flag clearing operates normally (read the status register
1 = Changes all ATD conversion complete flags to a fast clear
0 = ATD continues to run when the MCU is in wait mode
1 = ATD stops to save power when the MCU is in wait mode
AWAI
5
0
power consumption.
before reading the result register to clear the associated CCF
bit).
sequence. Any access to a result register (ATD0–7) will cause
the associated CCF flag to clear automatically if it was set at
the time.
Analog-to-Digital Converter
Go to: www.freescale.com
4
0
0
3
0
0
2
0
0
ASCIE
MC68HC912DG128 — Rev 3.0
1
0
ASCIF
Bit 0
0
$0062/$01E2
MOTOROLA

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