mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 345
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mc68hc912dg128
Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC912DG128.pdf
(452 pages)
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17.13.7 msCAN12 Receiver Interrupt Enable Register (CRIER)
MC68HC912DG128 — Rev 3.0
MOTOROLA
CRIER
$0105
RESET
WARNING:
W
R
NOTE:
WUPIE
Bit 7
0
OVRIF — Overrun Interrupt Flag
RXF — Receive Buffer Full
To ensure data integrity, no registers of the receive buffer shall be read
while the RXF flag is cleared.
The CRFLG register is held in the reset state when the SFTRES bit in
CMCR0 is set.
WUPIE — Wake-up Interrupt Enable
RWRNIE — Receiver Warning Interrupt Enable
RWRNIE
Freescale Semiconductor, Inc.
This flag is set when a data overrun condition occurs. If not masked,
an Error interrupt is pending while this flag is set.
The RXF flag is set by the msCAN12 when a new message is
available in the foreground receive buffer. This flag indicates whether
the buffer is loaded with a correctly received message. After the CPU
has read that message from the receive buffer the RXF flag must be
handshaken (cleared) in order to release the buffer. A set RXF flag
prohibits the exchange of the background receive buffer into the
foreground buffer. If not masked, a Receive interrupt is pending while
this flag is set.
6
0
For More Information On This Product,
0 = No data overrun has occurred.
1 = A data overrun has been detected.
0 = The receive buffer is released (not full).
1 = The receive buffer is full. A new message is available.
0 = No interruptis generated from this event.
1 = A wake-up event results in a wake-up interrupt.
0 = No interruptis generated from this event.
1 = A receiver warning status event results in an error interrupt.
TWRNIE
Go to: www.freescale.com
5
0
MSCAN Controller
RERRIE
4
0
TERRIE
3
0
Programmer’s Model of Control Registers
BOFFIE
2
0
OVRIE
1
0
MSCAN Controller
Technical Data
RXFIE
Bit 0
0
345
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