gc80c510 CORERIVER Semiconductor, gc80c510 Datasheet - Page 117

• Manufacturer Part Number: gc80c510
• Description: Eprom/rom 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

12 Appendix A: Instruction Set
MiDAS1.1 Family
Table 12-1 Note on Instruction Set and Addressing Modes
Notation
#data16
addr16
addr11
#data
direct
@Ri
Rn
rel
bit
Register R0 ~ R7 of the currently selected Register Bank (RB0 ~ RB3).
The address of 8-bit internal data location.
This could be an IRAM location (0x00 ~ 0x7F; 128 bytes) or a SFR (0x80 ~ 0xFF).
8-bit IRAM location (0x00 ~ 0xFF; 256 bytes) addressed indirectly through register R0
or R1.
8-bit constant included in instruction.
16-bit constant included in instruction.
16-bit destination address. Used by LCALL & LJMP. The branch can be anywhere
within the 64 kbytes program memory address space.
11-bit destination address. Used by ACALL & AJMP. The branch will be within the
same 2 kbytes page of program memory as the first byte of the following instruction.
Signed (2’s complement number) 8-bit offset byte. Used by SJMP and all conditional
jumps. Range is -128 to +127 byte relative to first byte of the following instruction.
Direct Addressed bit n IRAM of SFR.
Page 117 of 211
Description