isp1181 NXP Semiconductors, isp1181 Datasheet - Page 14

• Manufacturer Part Number: isp1181
• Description: Isp1181 Full-speed Universal Serial Bus Interface Device
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 08938
Product data
9.3 Endpoint initialization
9.4 Endpoint I/O mode access
9.5 Special actions on control endpoints
In response to the standard USB request Set Interface, the firmware must program all
16 ECRs of the ISP1181 in sequence (see
enabled or not. The hardware will then automatically allocate FIFO storage space.
If all endpoints have been configured successfully, the firmware must return an empty
packet to the control IN endpoint to acknowledge success to the host. If there are
errors in the endpoint configuration, the firmware must stall the control IN endpoint.
When reset by hardware or via the USB bus, the ISP1181 disables all endpoints and
clears all ECRs, except for the control endpoint which is fixed and always enabled.
Endpoint initialization can be done at any time; however, it is valid only after
enumeration.
When an endpoint event occurs (a packet is transmitted or received), the associated
endpoint interrupt bits (EPn) of the Interrupt Register (IR) will be set by the SIE. The
firmware then responds to the interrupt and selects the endpoint for processing.
The endpoint interrupt bit will be cleared by reading the Endpoint Status Register
(ESR). The ESR also contains information on the status of the endpoint buffer.
For an OUT (= receive) endpoint, the packet length and packet data can be read from
ISP1181 using the Read Buffer command. When the whole packet has been read,
the firmware sends a Clear Buffer command to enable the reception of new packets.
For an IN (= transmit) endpoint, the packet length and data to be sent can be written
to ISP1181 using the Write Buffer command. When the whole packet has been
written to the buffer, the firmware sends a Validate Buffer command to enable data
transmission to the host.
Control endpoints require special firmware actions. The arrival of a SETUP packet
flushes the IN buffer and disables the Validate Buffer and Clear Buffer commands for
the control IN and OUT endpoints. The microcontroller needs to re-enable these
commands by sending an Acknowledge Setup command to both control endpoints.
This ensures that the last SETUP packet stays in the buffer and that no packets can
be sent back to the host until the microcontroller has explicitly acknowledged that it
has seen the SETUP packet.
Rev. 04 — 30 October 2001
Table
4), whether the endpoints are
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Full-speed USB interface
ISP1181
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